crypto/keembay/ocs-hcu.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Intel Keem Bay OCS HCU Crypto Driver.
0004  *
0005  * Copyright (C) 2018-2020 Intel Corporation
0006  */
0007
0008 #include <linux/dma-mapping.h>
0009
0010 #ifndef _CRYPTO_OCS_HCU_H
0011 #define _CRYPTO_OCS_HCU_H
0012
0013 #define OCS_HCU_DMA_BIT_MASK        DMA_BIT_MASK(32)
0014
0015 #define OCS_HCU_HW_KEY_LEN      64
0016
0017 struct ocs_hcu_dma_list;
0018
0019 enum ocs_hcu_algo {
0020     OCS_HCU_ALGO_SHA256 = 2,
0021     OCS_HCU_ALGO_SHA224 = 3,
0022     OCS_HCU_ALGO_SHA384 = 4,
0023     OCS_HCU_ALGO_SHA512 = 5,
0024     OCS_HCU_ALGO_SM3    = 6,
0025 };
0026
0027 /**
0028  * struct ocs_hcu_dev - OCS HCU device context.
0029  * @list:   List of device contexts.
0030  * @dev:    OCS HCU device.
0031  * @io_base:    Base address of OCS HCU registers.
0032  * @engine: Crypto engine for the device.
0033  * @irq:    IRQ number.
0034  * @irq_done:   Completion for IRQ.
0035  * @irq_err:    Flag indicating an IRQ error has happened.
0036  */
0037 struct ocs_hcu_dev {
0038     struct list_head list;
0039     struct device *dev;
0040     void __iomem *io_base;
0041     struct crypto_engine *engine;
0042     int irq;
0043     struct completion irq_done;
0044     bool irq_err;
0045 };
0046
0047 /**
0048  * struct ocs_hcu_idata - Intermediate data generated by the HCU.
0049  * @msg_len_lo: Length of data the HCU has operated on in bits, low 32b.
0050  * @msg_len_hi: Length of data the HCU has operated on in bits, high 32b.
0051  * @digest: The digest read from the HCU. If the HCU is terminated, it will
0052  *      contain the actual hash digest. Otherwise it is the intermediate
0053  *      state.
0054  */
0055 struct ocs_hcu_idata {
0056     u32 msg_len_lo;
0057     u32 msg_len_hi;
0058     u8  digest[SHA512_DIGEST_SIZE];
0059 };
0060
0061 /**
0062  * struct ocs_hcu_hash_ctx - Context for OCS HCU hashing operation.
0063  * @algo:   The hashing algorithm being used.
0064  * @idata:  The current intermediate data.
0065  */
0066 struct ocs_hcu_hash_ctx {
0067     enum ocs_hcu_algo   algo;
0068     struct ocs_hcu_idata    idata;
0069 };
0070
0071 irqreturn_t ocs_hcu_irq_handler(int irq, void *dev_id);
0072
0073 struct ocs_hcu_dma_list *ocs_hcu_dma_list_alloc(struct ocs_hcu_dev *hcu_dev,
0074                         int max_nents);
0075
0076 void ocs_hcu_dma_list_free(struct ocs_hcu_dev *hcu_dev,
0077                struct ocs_hcu_dma_list *dma_list);
0078
0079 int ocs_hcu_dma_list_add_tail(struct ocs_hcu_dev *hcu_dev,
0080                   struct ocs_hcu_dma_list *dma_list,
0081                   dma_addr_t addr, u32 len);
0082
0083 int ocs_hcu_hash_init(struct ocs_hcu_hash_ctx *ctx, enum ocs_hcu_algo algo);
0084
0085 int ocs_hcu_hash_update(struct ocs_hcu_dev *hcu_dev,
0086             struct ocs_hcu_hash_ctx *ctx,
0087             const struct ocs_hcu_dma_list *dma_list);
0088
0089 int ocs_hcu_hash_finup(struct ocs_hcu_dev *hcu_dev,
0090                const struct ocs_hcu_hash_ctx *ctx,
0091                const struct ocs_hcu_dma_list *dma_list,
0092                u8 *dgst, size_t dgst_len);
0093
0094 int ocs_hcu_hash_final(struct ocs_hcu_dev *hcu_dev,
0095                const struct ocs_hcu_hash_ctx *ctx, u8 *dgst,
0096                size_t dgst_len);
0097
0098 int ocs_hcu_digest(struct ocs_hcu_dev *hcu_dev, enum ocs_hcu_algo algo,
0099            void *data, size_t data_len, u8 *dgst, size_t dgst_len);
0100
0101 int ocs_hcu_hmac(struct ocs_hcu_dev *hcu_dev, enum ocs_hcu_algo algo,
0102          const u8 *key, size_t key_len,
0103          const struct ocs_hcu_dma_list *dma_list,
0104          u8 *dgst, size_t dgst_len);
0105
0106 #endif /* _CRYPTO_OCS_HCU_H */