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0012 #include <linux/clk.h>
0013 #include <linux/crypto.h>
0014 #include <linux/err.h>
0015 #include <linux/io.h>
0016 #include <linux/module.h>
0017 #include <linux/mutex.h>
0018 #include <linux/of_device.h>
0019 #include <linux/platform_device.h>
0020
0021 #include <crypto/internal/rng.h>
0022
0023 #define EXYNOS_RNG_CONTROL 0x0
0024 #define EXYNOS_RNG_STATUS 0x10
0025
0026 #define EXYNOS_RNG_SEED_CONF 0x14
0027 #define EXYNOS_RNG_GEN_PRNG BIT(1)
0028
0029 #define EXYNOS_RNG_SEED_BASE 0x140
0030 #define EXYNOS_RNG_SEED(n) (EXYNOS_RNG_SEED_BASE + (n * 0x4))
0031 #define EXYNOS_RNG_OUT_BASE 0x160
0032 #define EXYNOS_RNG_OUT(n) (EXYNOS_RNG_OUT_BASE + (n * 0x4))
0033
0034
0035 #define EXYNOS_RNG_CONTROL_START 0x18
0036
0037 #define EXYNOS_RNG_STATUS_SEED_SETTING_DONE BIT(1)
0038 #define EXYNOS_RNG_STATUS_RNG_DONE BIT(5)
0039
0040
0041 #define EXYNOS_RNG_SEED_REGS 5
0042 #define EXYNOS_RNG_SEED_SIZE (EXYNOS_RNG_SEED_REGS * 4)
0043
0044 enum exynos_prng_type {
0045 EXYNOS_PRNG_UNKNOWN = 0,
0046 EXYNOS_PRNG_EXYNOS4,
0047 EXYNOS_PRNG_EXYNOS5,
0048 };
0049
0050
0051
0052
0053
0054
0055
0056 #define EXYNOS_RNG_RESEED_TIME 1000
0057 #define EXYNOS_RNG_RESEED_BYTES 65536
0058
0059
0060
0061
0062 #define EXYNOS_RNG_WAIT_RETRIES 100
0063
0064
0065 struct exynos_rng_ctx {
0066 struct exynos_rng_dev *rng;
0067 };
0068
0069
0070 struct exynos_rng_dev {
0071 struct device *dev;
0072 enum exynos_prng_type type;
0073 void __iomem *mem;
0074 struct clk *clk;
0075 struct mutex lock;
0076
0077 u8 seed_save[EXYNOS_RNG_SEED_SIZE];
0078 unsigned int seed_save_len;
0079
0080 unsigned long last_seeding;
0081
0082 unsigned long bytes_seeding;
0083 };
0084
0085 static struct exynos_rng_dev *exynos_rng_dev;
0086
0087 static u32 exynos_rng_readl(struct exynos_rng_dev *rng, u32 offset)
0088 {
0089 return readl_relaxed(rng->mem + offset);
0090 }
0091
0092 static void exynos_rng_writel(struct exynos_rng_dev *rng, u32 val, u32 offset)
0093 {
0094 writel_relaxed(val, rng->mem + offset);
0095 }
0096
0097 static int exynos_rng_set_seed(struct exynos_rng_dev *rng,
0098 const u8 *seed, unsigned int slen)
0099 {
0100 u32 val;
0101 int i;
0102
0103
0104 slen = ALIGN_DOWN(slen, 4);
0105
0106 if (slen < EXYNOS_RNG_SEED_SIZE)
0107 return -EINVAL;
0108
0109 for (i = 0; i < slen ; i += 4) {
0110 unsigned int seed_reg = (i / 4) % EXYNOS_RNG_SEED_REGS;
0111
0112 val = seed[i] << 24;
0113 val |= seed[i + 1] << 16;
0114 val |= seed[i + 2] << 8;
0115 val |= seed[i + 3] << 0;
0116
0117 exynos_rng_writel(rng, val, EXYNOS_RNG_SEED(seed_reg));
0118 }
0119
0120 val = exynos_rng_readl(rng, EXYNOS_RNG_STATUS);
0121 if (!(val & EXYNOS_RNG_STATUS_SEED_SETTING_DONE)) {
0122 dev_warn(rng->dev, "Seed setting not finished\n");
0123 return -EIO;
0124 }
0125
0126 rng->last_seeding = jiffies;
0127 rng->bytes_seeding = 0;
0128
0129 return 0;
0130 }
0131
0132
0133
0134
0135
0136
0137
0138
0139
0140 static int exynos_rng_get_random(struct exynos_rng_dev *rng,
0141 u8 *dst, unsigned int dlen,
0142 unsigned int *read)
0143 {
0144 int retry = EXYNOS_RNG_WAIT_RETRIES;
0145
0146 if (rng->type == EXYNOS_PRNG_EXYNOS4) {
0147 exynos_rng_writel(rng, EXYNOS_RNG_CONTROL_START,
0148 EXYNOS_RNG_CONTROL);
0149 } else if (rng->type == EXYNOS_PRNG_EXYNOS5) {
0150 exynos_rng_writel(rng, EXYNOS_RNG_GEN_PRNG,
0151 EXYNOS_RNG_SEED_CONF);
0152 }
0153
0154 while (!(exynos_rng_readl(rng,
0155 EXYNOS_RNG_STATUS) & EXYNOS_RNG_STATUS_RNG_DONE) && --retry)
0156 cpu_relax();
0157
0158 if (!retry)
0159 return -ETIMEDOUT;
0160
0161
0162 exynos_rng_writel(rng, EXYNOS_RNG_STATUS_RNG_DONE,
0163 EXYNOS_RNG_STATUS);
0164 *read = min_t(size_t, dlen, EXYNOS_RNG_SEED_SIZE);
0165 memcpy_fromio(dst, rng->mem + EXYNOS_RNG_OUT_BASE, *read);
0166 rng->bytes_seeding += *read;
0167
0168 return 0;
0169 }
0170
0171
0172 static void exynos_rng_reseed(struct exynos_rng_dev *rng)
0173 {
0174 unsigned long next_seeding = rng->last_seeding + \
0175 msecs_to_jiffies(EXYNOS_RNG_RESEED_TIME);
0176 unsigned long now = jiffies;
0177 unsigned int read = 0;
0178 u8 seed[EXYNOS_RNG_SEED_SIZE];
0179
0180 if (time_before(now, next_seeding) &&
0181 rng->bytes_seeding < EXYNOS_RNG_RESEED_BYTES)
0182 return;
0183
0184 if (exynos_rng_get_random(rng, seed, sizeof(seed), &read))
0185 return;
0186
0187 exynos_rng_set_seed(rng, seed, read);
0188
0189
0190 mutex_unlock(&rng->lock);
0191 mutex_lock(&rng->lock);
0192 }
0193
0194 static int exynos_rng_generate(struct crypto_rng *tfm,
0195 const u8 *src, unsigned int slen,
0196 u8 *dst, unsigned int dlen)
0197 {
0198 struct exynos_rng_ctx *ctx = crypto_rng_ctx(tfm);
0199 struct exynos_rng_dev *rng = ctx->rng;
0200 unsigned int read = 0;
0201 int ret;
0202
0203 ret = clk_prepare_enable(rng->clk);
0204 if (ret)
0205 return ret;
0206
0207 mutex_lock(&rng->lock);
0208 do {
0209 ret = exynos_rng_get_random(rng, dst, dlen, &read);
0210 if (ret)
0211 break;
0212
0213 dlen -= read;
0214 dst += read;
0215
0216 exynos_rng_reseed(rng);
0217 } while (dlen > 0);
0218 mutex_unlock(&rng->lock);
0219
0220 clk_disable_unprepare(rng->clk);
0221
0222 return ret;
0223 }
0224
0225 static int exynos_rng_seed(struct crypto_rng *tfm, const u8 *seed,
0226 unsigned int slen)
0227 {
0228 struct exynos_rng_ctx *ctx = crypto_rng_ctx(tfm);
0229 struct exynos_rng_dev *rng = ctx->rng;
0230 int ret;
0231
0232 ret = clk_prepare_enable(rng->clk);
0233 if (ret)
0234 return ret;
0235
0236 mutex_lock(&rng->lock);
0237 ret = exynos_rng_set_seed(ctx->rng, seed, slen);
0238 mutex_unlock(&rng->lock);
0239
0240 clk_disable_unprepare(rng->clk);
0241
0242 return ret;
0243 }
0244
0245 static int exynos_rng_kcapi_init(struct crypto_tfm *tfm)
0246 {
0247 struct exynos_rng_ctx *ctx = crypto_tfm_ctx(tfm);
0248
0249 ctx->rng = exynos_rng_dev;
0250
0251 return 0;
0252 }
0253
0254 static struct rng_alg exynos_rng_alg = {
0255 .generate = exynos_rng_generate,
0256 .seed = exynos_rng_seed,
0257 .seedsize = EXYNOS_RNG_SEED_SIZE,
0258 .base = {
0259 .cra_name = "stdrng",
0260 .cra_driver_name = "exynos_rng",
0261 .cra_priority = 300,
0262 .cra_ctxsize = sizeof(struct exynos_rng_ctx),
0263 .cra_module = THIS_MODULE,
0264 .cra_init = exynos_rng_kcapi_init,
0265 }
0266 };
0267
0268 static int exynos_rng_probe(struct platform_device *pdev)
0269 {
0270 struct exynos_rng_dev *rng;
0271 int ret;
0272
0273 if (exynos_rng_dev)
0274 return -EEXIST;
0275
0276 rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL);
0277 if (!rng)
0278 return -ENOMEM;
0279
0280 rng->type = (enum exynos_prng_type)of_device_get_match_data(&pdev->dev);
0281
0282 mutex_init(&rng->lock);
0283
0284 rng->dev = &pdev->dev;
0285 rng->clk = devm_clk_get(&pdev->dev, "secss");
0286 if (IS_ERR(rng->clk)) {
0287 dev_err(&pdev->dev, "Couldn't get clock.\n");
0288 return PTR_ERR(rng->clk);
0289 }
0290
0291 rng->mem = devm_platform_ioremap_resource(pdev, 0);
0292 if (IS_ERR(rng->mem))
0293 return PTR_ERR(rng->mem);
0294
0295 platform_set_drvdata(pdev, rng);
0296
0297 exynos_rng_dev = rng;
0298
0299 ret = crypto_register_rng(&exynos_rng_alg);
0300 if (ret) {
0301 dev_err(&pdev->dev,
0302 "Couldn't register rng crypto alg: %d\n", ret);
0303 exynos_rng_dev = NULL;
0304 }
0305
0306 return ret;
0307 }
0308
0309 static int exynos_rng_remove(struct platform_device *pdev)
0310 {
0311 crypto_unregister_rng(&exynos_rng_alg);
0312
0313 exynos_rng_dev = NULL;
0314
0315 return 0;
0316 }
0317
0318 static int __maybe_unused exynos_rng_suspend(struct device *dev)
0319 {
0320 struct exynos_rng_dev *rng = dev_get_drvdata(dev);
0321 int ret;
0322
0323
0324 if (!rng->last_seeding)
0325 return 0;
0326
0327 rng->seed_save_len = 0;
0328 ret = clk_prepare_enable(rng->clk);
0329 if (ret)
0330 return ret;
0331
0332 mutex_lock(&rng->lock);
0333
0334
0335 exynos_rng_get_random(rng, rng->seed_save, sizeof(rng->seed_save),
0336 &(rng->seed_save_len));
0337
0338 mutex_unlock(&rng->lock);
0339
0340 dev_dbg(rng->dev, "Stored %u bytes for seeding on system resume\n",
0341 rng->seed_save_len);
0342
0343 clk_disable_unprepare(rng->clk);
0344
0345 return 0;
0346 }
0347
0348 static int __maybe_unused exynos_rng_resume(struct device *dev)
0349 {
0350 struct exynos_rng_dev *rng = dev_get_drvdata(dev);
0351 int ret;
0352
0353
0354 if (!rng->last_seeding)
0355 return 0;
0356
0357 ret = clk_prepare_enable(rng->clk);
0358 if (ret)
0359 return ret;
0360
0361 mutex_lock(&rng->lock);
0362
0363 ret = exynos_rng_set_seed(rng, rng->seed_save, rng->seed_save_len);
0364
0365 mutex_unlock(&rng->lock);
0366
0367 clk_disable_unprepare(rng->clk);
0368
0369 return ret;
0370 }
0371
0372 static SIMPLE_DEV_PM_OPS(exynos_rng_pm_ops, exynos_rng_suspend,
0373 exynos_rng_resume);
0374
0375 static const struct of_device_id exynos_rng_dt_match[] = {
0376 {
0377 .compatible = "samsung,exynos4-rng",
0378 .data = (const void *)EXYNOS_PRNG_EXYNOS4,
0379 }, {
0380 .compatible = "samsung,exynos5250-prng",
0381 .data = (const void *)EXYNOS_PRNG_EXYNOS5,
0382 },
0383 { },
0384 };
0385 MODULE_DEVICE_TABLE(of, exynos_rng_dt_match);
0386
0387 static struct platform_driver exynos_rng_driver = {
0388 .driver = {
0389 .name = "exynos-rng",
0390 .pm = &exynos_rng_pm_ops,
0391 .of_match_table = exynos_rng_dt_match,
0392 },
0393 .probe = exynos_rng_probe,
0394 .remove = exynos_rng_remove,
0395 };
0396
0397 module_platform_driver(exynos_rng_driver);
0398
0399 MODULE_DESCRIPTION("Exynos H/W Random Number Generator driver");
0400 MODULE_AUTHOR("Krzysztof Kozlowski <krzk@kernel.org>");
0401 MODULE_LICENSE("GPL v2");