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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
0003 
0004 #ifndef __CC_SRAM_MGR_H__
0005 #define __CC_SRAM_MGR_H__
0006 
0007 #ifndef CC_CC_SRAM_SIZE
0008 #define CC_CC_SRAM_SIZE 4096
0009 #endif
0010 
0011 struct cc_drvdata;
0012 
0013 #define NULL_SRAM_ADDR ((u32)-1)
0014 
0015 /**
0016  * cc_sram_mgr_init() - Initializes SRAM pool.
0017  * The first X bytes of SRAM are reserved for ROM usage, hence, pool
0018  * starts right after X bytes.
0019  *
0020  * @drvdata: Associated device driver context
0021  *
0022  * Return:
0023  * Zero for success, negative value otherwise.
0024  */
0025 int cc_sram_mgr_init(struct cc_drvdata *drvdata);
0026 
0027 /**
0028  * cc_sram_alloc() - Allocate buffer from SRAM pool.
0029  *
0030  * @drvdata: Associated device driver context
0031  * @size: The requested bytes to allocate
0032  *
0033  * Return:
0034  * Address offset in SRAM or NULL_SRAM_ADDR for failure.
0035  */
0036 u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size);
0037 
0038 /**
0039  * cc_set_sram_desc() - Create const descriptors sequence to
0040  *  set values in given array into SRAM.
0041  * Note: each const value can't exceed word size.
0042  *
0043  * @src:      A pointer to array of words to set as consts.
0044  * @dst:      The target SRAM buffer to set into
0045  * @nelement:     The number of words in "src" array
0046  * @seq:      A pointer to the given IN/OUT descriptor sequence
0047  * @seq_len:      A pointer to the given IN/OUT sequence length
0048  */
0049 void cc_set_sram_desc(const u32 *src, u32 dst, unsigned int nelement,
0050               struct cc_hw_desc *seq, unsigned int *seq_len);
0051 
0052 #endif /*__CC_SRAM_MGR_H__*/