0001
0002
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0004 #include "cc_driver.h"
0005 #include "cc_sram_mgr.h"
0006
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0015
0016
0017 int cc_sram_mgr_init(struct cc_drvdata *drvdata)
0018 {
0019 u32 start = 0;
0020 struct device *dev = drvdata_to_dev(drvdata);
0021
0022 if (drvdata->hw_rev < CC_HW_REV_712) {
0023
0024 start = cc_ioread(drvdata, CC_REG(HOST_SEP_SRAM_THRESHOLD));
0025 if ((start & 0x3) != 0) {
0026 dev_err(dev, "Invalid SRAM offset 0x%x\n", start);
0027 return -EINVAL;
0028 }
0029 }
0030
0031 drvdata->sram_free_offset = start;
0032 return 0;
0033 }
0034
0035
0036
0037
0038
0039
0040
0041
0042
0043
0044 u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size)
0045 {
0046 struct device *dev = drvdata_to_dev(drvdata);
0047 u32 p;
0048
0049 if ((size & 0x3)) {
0050 dev_err(dev, "Requested buffer size (%u) is not multiple of 4",
0051 size);
0052 return NULL_SRAM_ADDR;
0053 }
0054 if (size > (CC_CC_SRAM_SIZE - drvdata->sram_free_offset)) {
0055 dev_err(dev, "Not enough space to allocate %u B (at offset %u)\n",
0056 size, drvdata->sram_free_offset);
0057 return NULL_SRAM_ADDR;
0058 }
0059
0060 p = drvdata->sram_free_offset;
0061 drvdata->sram_free_offset += size;
0062 dev_dbg(dev, "Allocated %u B @ %u\n", size, p);
0063 return p;
0064 }
0065
0066
0067
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0071
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0075
0076
0077 void cc_set_sram_desc(const u32 *src, u32 dst, unsigned int nelement,
0078 struct cc_hw_desc *seq, unsigned int *seq_len)
0079 {
0080 u32 i;
0081 unsigned int idx = *seq_len;
0082
0083 for (i = 0; i < nelement; i++, idx++) {
0084 hw_desc_init(&seq[idx]);
0085 set_din_const(&seq[idx], src[i], sizeof(u32));
0086 set_dout_sram(&seq[idx], dst + (i * sizeof(u32)), sizeof(u32));
0087 set_flow_mode(&seq[idx], BYPASS);
0088 }
0089
0090 *seq_len = idx;
0091 }