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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * AMD Secure Processor device driver
0004  *
0005  * Copyright (C) 2013,2019 Advanced Micro Devices, Inc.
0006  *
0007  * Author: Tom Lendacky <thomas.lendacky@amd.com>
0008  * Author: Gary R Hook <gary.hook@amd.com>
0009  */
0010 
0011 #include <linux/module.h>
0012 #include <linux/kernel.h>
0013 #include <linux/device.h>
0014 #include <linux/pci.h>
0015 #include <linux/pci_ids.h>
0016 #include <linux/dma-mapping.h>
0017 #include <linux/kthread.h>
0018 #include <linux/sched.h>
0019 #include <linux/interrupt.h>
0020 #include <linux/spinlock.h>
0021 #include <linux/delay.h>
0022 #include <linux/ccp.h>
0023 
0024 #include "ccp-dev.h"
0025 #include "psp-dev.h"
0026 
0027 #define MSIX_VECTORS            2
0028 
0029 struct sp_pci {
0030     int msix_count;
0031     struct msix_entry msix_entry[MSIX_VECTORS];
0032 };
0033 static struct sp_device *sp_dev_master;
0034 
0035 #define attribute_show(name, def)                       \
0036 static ssize_t name##_show(struct device *d, struct device_attribute *attr, \
0037                char *buf)                       \
0038 {                                       \
0039     struct sp_device *sp = dev_get_drvdata(d);              \
0040     struct psp_device *psp = sp->psp_data;                  \
0041     int bit = PSP_SECURITY_##def << PSP_CAPABILITY_PSP_SECURITY_OFFSET; \
0042     return sysfs_emit(buf, "%d\n", (psp->capability & bit) > 0);        \
0043 }
0044 
0045 attribute_show(fused_part, FUSED_PART)
0046 static DEVICE_ATTR_RO(fused_part);
0047 attribute_show(debug_lock_on, DEBUG_LOCK_ON)
0048 static DEVICE_ATTR_RO(debug_lock_on);
0049 attribute_show(tsme_status, TSME_STATUS)
0050 static DEVICE_ATTR_RO(tsme_status);
0051 attribute_show(anti_rollback_status, ANTI_ROLLBACK_STATUS)
0052 static DEVICE_ATTR_RO(anti_rollback_status);
0053 attribute_show(rpmc_production_enabled, RPMC_PRODUCTION_ENABLED)
0054 static DEVICE_ATTR_RO(rpmc_production_enabled);
0055 attribute_show(rpmc_spirom_available, RPMC_SPIROM_AVAILABLE)
0056 static DEVICE_ATTR_RO(rpmc_spirom_available);
0057 attribute_show(hsp_tpm_available, HSP_TPM_AVAILABLE)
0058 static DEVICE_ATTR_RO(hsp_tpm_available);
0059 attribute_show(rom_armor_enforced, ROM_ARMOR_ENFORCED)
0060 static DEVICE_ATTR_RO(rom_armor_enforced);
0061 
0062 static struct attribute *psp_attrs[] = {
0063     &dev_attr_fused_part.attr,
0064     &dev_attr_debug_lock_on.attr,
0065     &dev_attr_tsme_status.attr,
0066     &dev_attr_anti_rollback_status.attr,
0067     &dev_attr_rpmc_production_enabled.attr,
0068     &dev_attr_rpmc_spirom_available.attr,
0069     &dev_attr_hsp_tpm_available.attr,
0070     &dev_attr_rom_armor_enforced.attr,
0071     NULL
0072 };
0073 
0074 static umode_t psp_security_is_visible(struct kobject *kobj, struct attribute *attr, int idx)
0075 {
0076     struct device *dev = kobj_to_dev(kobj);
0077     struct sp_device *sp = dev_get_drvdata(dev);
0078     struct psp_device *psp = sp->psp_data;
0079 
0080     if (psp && (psp->capability & PSP_CAPABILITY_PSP_SECURITY_REPORTING))
0081         return 0444;
0082 
0083     return 0;
0084 }
0085 
0086 static struct attribute_group psp_attr_group = {
0087     .attrs = psp_attrs,
0088     .is_visible = psp_security_is_visible,
0089 };
0090 
0091 static const struct attribute_group *psp_groups[] = {
0092     &psp_attr_group,
0093     NULL,
0094 };
0095 
0096 static int sp_get_msix_irqs(struct sp_device *sp)
0097 {
0098     struct sp_pci *sp_pci = sp->dev_specific;
0099     struct device *dev = sp->dev;
0100     struct pci_dev *pdev = to_pci_dev(dev);
0101     int v, ret;
0102 
0103     for (v = 0; v < ARRAY_SIZE(sp_pci->msix_entry); v++)
0104         sp_pci->msix_entry[v].entry = v;
0105 
0106     ret = pci_enable_msix_range(pdev, sp_pci->msix_entry, 1, v);
0107     if (ret < 0)
0108         return ret;
0109 
0110     sp_pci->msix_count = ret;
0111     sp->use_tasklet = true;
0112 
0113     sp->psp_irq = sp_pci->msix_entry[0].vector;
0114     sp->ccp_irq = (sp_pci->msix_count > 1) ? sp_pci->msix_entry[1].vector
0115                            : sp_pci->msix_entry[0].vector;
0116     return 0;
0117 }
0118 
0119 static int sp_get_msi_irq(struct sp_device *sp)
0120 {
0121     struct device *dev = sp->dev;
0122     struct pci_dev *pdev = to_pci_dev(dev);
0123     int ret;
0124 
0125     ret = pci_enable_msi(pdev);
0126     if (ret)
0127         return ret;
0128 
0129     sp->ccp_irq = pdev->irq;
0130     sp->psp_irq = pdev->irq;
0131 
0132     return 0;
0133 }
0134 
0135 static int sp_get_irqs(struct sp_device *sp)
0136 {
0137     struct device *dev = sp->dev;
0138     int ret;
0139 
0140     ret = sp_get_msix_irqs(sp);
0141     if (!ret)
0142         return 0;
0143 
0144     /* Couldn't get MSI-X vectors, try MSI */
0145     dev_notice(dev, "could not enable MSI-X (%d), trying MSI\n", ret);
0146     ret = sp_get_msi_irq(sp);
0147     if (!ret)
0148         return 0;
0149 
0150     /* Couldn't get MSI interrupt */
0151     dev_notice(dev, "could not enable MSI (%d)\n", ret);
0152 
0153     return ret;
0154 }
0155 
0156 static void sp_free_irqs(struct sp_device *sp)
0157 {
0158     struct sp_pci *sp_pci = sp->dev_specific;
0159     struct device *dev = sp->dev;
0160     struct pci_dev *pdev = to_pci_dev(dev);
0161 
0162     if (sp_pci->msix_count)
0163         pci_disable_msix(pdev);
0164     else if (sp->psp_irq)
0165         pci_disable_msi(pdev);
0166 
0167     sp->ccp_irq = 0;
0168     sp->psp_irq = 0;
0169 }
0170 
0171 static bool sp_pci_is_master(struct sp_device *sp)
0172 {
0173     struct device *dev_cur, *dev_new;
0174     struct pci_dev *pdev_cur, *pdev_new;
0175 
0176     dev_new = sp->dev;
0177     dev_cur = sp_dev_master->dev;
0178 
0179     pdev_new = to_pci_dev(dev_new);
0180     pdev_cur = to_pci_dev(dev_cur);
0181 
0182     if (pdev_new->bus->number < pdev_cur->bus->number)
0183         return true;
0184 
0185     if (PCI_SLOT(pdev_new->devfn) < PCI_SLOT(pdev_cur->devfn))
0186         return true;
0187 
0188     if (PCI_FUNC(pdev_new->devfn) < PCI_FUNC(pdev_cur->devfn))
0189         return true;
0190 
0191     return false;
0192 }
0193 
0194 static void psp_set_master(struct sp_device *sp)
0195 {
0196     if (!sp_dev_master) {
0197         sp_dev_master = sp;
0198         return;
0199     }
0200 
0201     if (sp_pci_is_master(sp))
0202         sp_dev_master = sp;
0203 }
0204 
0205 static struct sp_device *psp_get_master(void)
0206 {
0207     return sp_dev_master;
0208 }
0209 
0210 static void psp_clear_master(struct sp_device *sp)
0211 {
0212     if (sp == sp_dev_master) {
0213         sp_dev_master = NULL;
0214         dev_dbg(sp->dev, "Cleared sp_dev_master\n");
0215     }
0216 }
0217 
0218 static int sp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
0219 {
0220     struct sp_device *sp;
0221     struct sp_pci *sp_pci;
0222     struct device *dev = &pdev->dev;
0223     void __iomem * const *iomap_table;
0224     int bar_mask;
0225     int ret;
0226 
0227     ret = -ENOMEM;
0228     sp = sp_alloc_struct(dev);
0229     if (!sp)
0230         goto e_err;
0231 
0232     sp_pci = devm_kzalloc(dev, sizeof(*sp_pci), GFP_KERNEL);
0233     if (!sp_pci)
0234         goto e_err;
0235 
0236     sp->dev_specific = sp_pci;
0237     sp->dev_vdata = (struct sp_dev_vdata *)id->driver_data;
0238     if (!sp->dev_vdata) {
0239         ret = -ENODEV;
0240         dev_err(dev, "missing driver data\n");
0241         goto e_err;
0242     }
0243 
0244     ret = pcim_enable_device(pdev);
0245     if (ret) {
0246         dev_err(dev, "pcim_enable_device failed (%d)\n", ret);
0247         goto e_err;
0248     }
0249 
0250     bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
0251     ret = pcim_iomap_regions(pdev, bar_mask, "ccp");
0252     if (ret) {
0253         dev_err(dev, "pcim_iomap_regions failed (%d)\n", ret);
0254         goto e_err;
0255     }
0256 
0257     iomap_table = pcim_iomap_table(pdev);
0258     if (!iomap_table) {
0259         dev_err(dev, "pcim_iomap_table failed\n");
0260         ret = -ENOMEM;
0261         goto e_err;
0262     }
0263 
0264     sp->io_map = iomap_table[sp->dev_vdata->bar];
0265     if (!sp->io_map) {
0266         dev_err(dev, "ioremap failed\n");
0267         ret = -ENOMEM;
0268         goto e_err;
0269     }
0270 
0271     ret = sp_get_irqs(sp);
0272     if (ret)
0273         goto e_err;
0274 
0275     pci_set_master(pdev);
0276     sp->set_psp_master_device = psp_set_master;
0277     sp->get_psp_master_device = psp_get_master;
0278     sp->clear_psp_master_device = psp_clear_master;
0279 
0280     ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48));
0281     if (ret) {
0282         ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
0283         if (ret) {
0284             dev_err(dev, "dma_set_mask_and_coherent failed (%d)\n",
0285                 ret);
0286             goto free_irqs;
0287         }
0288     }
0289 
0290     dev_set_drvdata(dev, sp);
0291 
0292     ret = sp_init(sp);
0293     if (ret)
0294         goto free_irqs;
0295 
0296     return 0;
0297 
0298 free_irqs:
0299     sp_free_irqs(sp);
0300 e_err:
0301     dev_notice(dev, "initialization failed\n");
0302     return ret;
0303 }
0304 
0305 static void sp_pci_shutdown(struct pci_dev *pdev)
0306 {
0307     struct device *dev = &pdev->dev;
0308     struct sp_device *sp = dev_get_drvdata(dev);
0309 
0310     if (!sp)
0311         return;
0312 
0313     sp_destroy(sp);
0314 }
0315 
0316 static void sp_pci_remove(struct pci_dev *pdev)
0317 {
0318     struct device *dev = &pdev->dev;
0319     struct sp_device *sp = dev_get_drvdata(dev);
0320 
0321     if (!sp)
0322         return;
0323 
0324     sp_destroy(sp);
0325 
0326     sp_free_irqs(sp);
0327 }
0328 
0329 static int __maybe_unused sp_pci_suspend(struct device *dev)
0330 {
0331     struct sp_device *sp = dev_get_drvdata(dev);
0332 
0333     return sp_suspend(sp);
0334 }
0335 
0336 static int __maybe_unused sp_pci_resume(struct device *dev)
0337 {
0338     struct sp_device *sp = dev_get_drvdata(dev);
0339 
0340     return sp_resume(sp);
0341 }
0342 
0343 #ifdef CONFIG_CRYPTO_DEV_SP_PSP
0344 static const struct sev_vdata sevv1 = {
0345     .cmdresp_reg        = 0x10580,
0346     .cmdbuff_addr_lo_reg    = 0x105e0,
0347     .cmdbuff_addr_hi_reg    = 0x105e4,
0348 };
0349 
0350 static const struct sev_vdata sevv2 = {
0351     .cmdresp_reg        = 0x10980,
0352     .cmdbuff_addr_lo_reg    = 0x109e0,
0353     .cmdbuff_addr_hi_reg    = 0x109e4,
0354 };
0355 
0356 static const struct tee_vdata teev1 = {
0357     .cmdresp_reg        = 0x10544,
0358     .cmdbuff_addr_lo_reg    = 0x10548,
0359     .cmdbuff_addr_hi_reg    = 0x1054c,
0360     .ring_wptr_reg          = 0x10550,
0361     .ring_rptr_reg          = 0x10554,
0362 };
0363 
0364 static const struct psp_vdata pspv1 = {
0365     .sev            = &sevv1,
0366     .feature_reg        = 0x105fc,
0367     .inten_reg      = 0x10610,
0368     .intsts_reg     = 0x10614,
0369 };
0370 
0371 static const struct psp_vdata pspv2 = {
0372     .sev            = &sevv2,
0373     .feature_reg        = 0x109fc,
0374     .inten_reg      = 0x10690,
0375     .intsts_reg     = 0x10694,
0376 };
0377 
0378 static const struct psp_vdata pspv3 = {
0379     .tee            = &teev1,
0380     .feature_reg        = 0x109fc,
0381     .inten_reg      = 0x10690,
0382     .intsts_reg     = 0x10694,
0383 };
0384 #endif
0385 
0386 static const struct sp_dev_vdata dev_vdata[] = {
0387     {   /* 0 */
0388         .bar = 2,
0389 #ifdef CONFIG_CRYPTO_DEV_SP_CCP
0390         .ccp_vdata = &ccpv3,
0391 #endif
0392     },
0393     {   /* 1 */
0394         .bar = 2,
0395 #ifdef CONFIG_CRYPTO_DEV_SP_CCP
0396         .ccp_vdata = &ccpv5a,
0397 #endif
0398 #ifdef CONFIG_CRYPTO_DEV_SP_PSP
0399         .psp_vdata = &pspv1,
0400 #endif
0401     },
0402     {   /* 2 */
0403         .bar = 2,
0404 #ifdef CONFIG_CRYPTO_DEV_SP_CCP
0405         .ccp_vdata = &ccpv5b,
0406 #endif
0407     },
0408     {   /* 3 */
0409         .bar = 2,
0410 #ifdef CONFIG_CRYPTO_DEV_SP_CCP
0411         .ccp_vdata = &ccpv5a,
0412 #endif
0413 #ifdef CONFIG_CRYPTO_DEV_SP_PSP
0414         .psp_vdata = &pspv2,
0415 #endif
0416     },
0417     {   /* 4 */
0418         .bar = 2,
0419 #ifdef CONFIG_CRYPTO_DEV_SP_CCP
0420         .ccp_vdata = &ccpv5a,
0421 #endif
0422 #ifdef CONFIG_CRYPTO_DEV_SP_PSP
0423         .psp_vdata = &pspv3,
0424 #endif
0425     },
0426     {   /* 5 */
0427         .bar = 2,
0428 #ifdef CONFIG_CRYPTO_DEV_SP_PSP
0429         .psp_vdata = &pspv2,
0430 #endif
0431     },
0432     {   /* 6 */
0433         .bar = 2,
0434 #ifdef CONFIG_CRYPTO_DEV_SP_PSP
0435         .psp_vdata = &pspv3,
0436 #endif
0437     },
0438 };
0439 static const struct pci_device_id sp_pci_table[] = {
0440     { PCI_VDEVICE(AMD, 0x1537), (kernel_ulong_t)&dev_vdata[0] },
0441     { PCI_VDEVICE(AMD, 0x1456), (kernel_ulong_t)&dev_vdata[1] },
0442     { PCI_VDEVICE(AMD, 0x1468), (kernel_ulong_t)&dev_vdata[2] },
0443     { PCI_VDEVICE(AMD, 0x1486), (kernel_ulong_t)&dev_vdata[3] },
0444     { PCI_VDEVICE(AMD, 0x15DF), (kernel_ulong_t)&dev_vdata[4] },
0445     { PCI_VDEVICE(AMD, 0x1649), (kernel_ulong_t)&dev_vdata[4] },
0446     { PCI_VDEVICE(AMD, 0x14CA), (kernel_ulong_t)&dev_vdata[5] },
0447     { PCI_VDEVICE(AMD, 0x15C7), (kernel_ulong_t)&dev_vdata[6] },
0448     /* Last entry must be zero */
0449     { 0, }
0450 };
0451 MODULE_DEVICE_TABLE(pci, sp_pci_table);
0452 
0453 static SIMPLE_DEV_PM_OPS(sp_pci_pm_ops, sp_pci_suspend, sp_pci_resume);
0454 
0455 static struct pci_driver sp_pci_driver = {
0456     .name = "ccp",
0457     .id_table = sp_pci_table,
0458     .probe = sp_pci_probe,
0459     .remove = sp_pci_remove,
0460     .shutdown = sp_pci_shutdown,
0461     .driver.pm = &sp_pci_pm_ops,
0462     .dev_groups = psp_groups,
0463 };
0464 
0465 int sp_pci_init(void)
0466 {
0467     return pci_register_driver(&sp_pci_driver);
0468 }
0469 
0470 void sp_pci_exit(void)
0471 {
0472     pci_unregister_driver(&sp_pci_driver);
0473 }
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