crypto/ccp/sp-dev.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * AMD Secure Processor driver
0004  *
0005  * Copyright (C) 2017-2019 Advanced Micro Devices, Inc.
0006  *
0007  * Author: Tom Lendacky <thomas.lendacky@amd.com>
0008  * Author: Gary R Hook <gary.hook@amd.com>
0009  * Author: Brijesh Singh <brijesh.singh@amd.com>
0010  */
0011
0012 #ifndef __SP_DEV_H__
0013 #define __SP_DEV_H__
0014
0015 #include <linux/device.h>
0016 #include <linux/spinlock.h>
0017 #include <linux/mutex.h>
0018 #include <linux/list.h>
0019 #include <linux/wait.h>
0020 #include <linux/dmapool.h>
0021 #include <linux/hw_random.h>
0022 #include <linux/bitops.h>
0023 #include <linux/interrupt.h>
0024 #include <linux/irqreturn.h>
0025
0026 #define SP_MAX_NAME_LEN     32
0027
0028 #define CACHE_NONE          0x00
0029 #define CACHE_WB_NO_ALLOC       0xb7
0030
0031 /* Structure to hold CCP device data */
0032 struct ccp_device;
0033 struct ccp_vdata {
0034     const unsigned int version;
0035     const unsigned int dma_chan_attr;
0036     void (*setup)(struct ccp_device *);
0037     const struct ccp_actions *perform;
0038     const unsigned int offset;
0039     const unsigned int rsamax;
0040 };
0041
0042 struct sev_vdata {
0043     const unsigned int cmdresp_reg;
0044     const unsigned int cmdbuff_addr_lo_reg;
0045     const unsigned int cmdbuff_addr_hi_reg;
0046 };
0047
0048 struct tee_vdata {
0049     const unsigned int cmdresp_reg;
0050     const unsigned int cmdbuff_addr_lo_reg;
0051     const unsigned int cmdbuff_addr_hi_reg;
0052     const unsigned int ring_wptr_reg;
0053     const unsigned int ring_rptr_reg;
0054 };
0055
0056 struct psp_vdata {
0057     const struct sev_vdata *sev;
0058     const struct tee_vdata *tee;
0059     const unsigned int feature_reg;
0060     const unsigned int inten_reg;
0061     const unsigned int intsts_reg;
0062 };
0063
0064 /* Structure to hold SP device data */
0065 struct sp_dev_vdata {
0066     const unsigned int bar;
0067
0068     const struct ccp_vdata *ccp_vdata;
0069     const struct psp_vdata *psp_vdata;
0070 };
0071
0072 struct sp_device {
0073     struct list_head entry;
0074
0075     struct device *dev;
0076
0077     struct sp_dev_vdata *dev_vdata;
0078     unsigned int ord;
0079     char name[SP_MAX_NAME_LEN];
0080
0081     /* Bus specific device information */
0082     void *dev_specific;
0083
0084     /* I/O area used for device communication. */
0085     void __iomem *io_map;
0086
0087     /* DMA caching attribute support */
0088     unsigned int axcache;
0089
0090     /* get and set master device */
0091     struct sp_device*(*get_psp_master_device)(void);
0092     void (*set_psp_master_device)(struct sp_device *);
0093     void (*clear_psp_master_device)(struct sp_device *);
0094
0095     bool irq_registered;
0096     bool use_tasklet;
0097
0098     unsigned int ccp_irq;
0099     irq_handler_t ccp_irq_handler;
0100     void *ccp_irq_data;
0101
0102     unsigned int psp_irq;
0103     irq_handler_t psp_irq_handler;
0104     void *psp_irq_data;
0105
0106     void *ccp_data;
0107     void *psp_data;
0108 };
0109
0110 int sp_pci_init(void);
0111 void sp_pci_exit(void);
0112
0113 int sp_platform_init(void);
0114 void sp_platform_exit(void);
0115
0116 struct sp_device *sp_alloc_struct(struct device *dev);
0117
0118 int sp_init(struct sp_device *sp);
0119 void sp_destroy(struct sp_device *sp);
0120 struct sp_device *sp_get_master(void);
0121
0122 int sp_suspend(struct sp_device *sp);
0123 int sp_resume(struct sp_device *sp);
0124 int sp_request_ccp_irq(struct sp_device *sp, irq_handler_t handler,
0125                const char *name, void *data);
0126 void sp_free_ccp_irq(struct sp_device *sp, void *data);
0127 int sp_request_psp_irq(struct sp_device *sp, irq_handler_t handler,
0128                const char *name, void *data);
0129 void sp_free_psp_irq(struct sp_device *sp, void *data);
0130 struct sp_device *sp_get_psp_master_device(void);
0131
0132 #ifdef CONFIG_CRYPTO_DEV_SP_CCP
0133
0134 int ccp_dev_init(struct sp_device *sp);
0135 void ccp_dev_destroy(struct sp_device *sp);
0136
0137 void ccp_dev_suspend(struct sp_device *sp);
0138 void ccp_dev_resume(struct sp_device *sp);
0139
0140 #else   /* !CONFIG_CRYPTO_DEV_SP_CCP */
0141
0142 static inline int ccp_dev_init(struct sp_device *sp)
0143 {
0144     return 0;
0145 }
0146 static inline void ccp_dev_destroy(struct sp_device *sp) { }
0147 static inline void ccp_dev_suspend(struct sp_device *sp) { }
0148 static inline void ccp_dev_resume(struct sp_device *sp) { }
0149 #endif  /* CONFIG_CRYPTO_DEV_SP_CCP */
0150
0151 #ifdef CONFIG_CRYPTO_DEV_SP_PSP
0152
0153 int psp_dev_init(struct sp_device *sp);
0154 void psp_pci_init(void);
0155 void psp_dev_destroy(struct sp_device *sp);
0156 void psp_pci_exit(void);
0157
0158 #else /* !CONFIG_CRYPTO_DEV_SP_PSP */
0159
0160 static inline int psp_dev_init(struct sp_device *sp) { return 0; }
0161 static inline void psp_pci_init(void) { }
0162 static inline void psp_dev_destroy(struct sp_device *sp) { }
0163 static inline void psp_pci_exit(void) { }
0164
0165 #endif /* CONFIG_CRYPTO_DEV_SP_PSP */
0166
0167 #endif