crypto/ccp/psp-dev.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * AMD Platform Security Processor (PSP) interface driver
0004  *
0005  * Copyright (C) 2017-2019 Advanced Micro Devices, Inc.
0006  *
0007  * Author: Brijesh Singh <brijesh.singh@amd.com>
0008  */
0009
0010 #ifndef __PSP_DEV_H__
0011 #define __PSP_DEV_H__
0012
0013 #include <linux/device.h>
0014 #include <linux/list.h>
0015 #include <linux/bits.h>
0016 #include <linux/interrupt.h>
0017
0018 #include "sp-dev.h"
0019
0020 #define PSP_CMDRESP_RESP        BIT(31)
0021 #define PSP_CMDRESP_ERR_MASK        0xffff
0022
0023 #define MAX_PSP_NAME_LEN        16
0024
0025 extern struct psp_device *psp_master;
0026
0027 typedef void (*psp_irq_handler_t)(int, void *, unsigned int);
0028
0029 struct psp_device {
0030     struct list_head entry;
0031
0032     struct psp_vdata *vdata;
0033     char name[MAX_PSP_NAME_LEN];
0034
0035     struct device *dev;
0036     struct sp_device *sp;
0037
0038     void __iomem *io_regs;
0039
0040     psp_irq_handler_t sev_irq_handler;
0041     void *sev_irq_data;
0042
0043     psp_irq_handler_t tee_irq_handler;
0044     void *tee_irq_data;
0045
0046     void *sev_data;
0047     void *tee_data;
0048
0049     unsigned int capability;
0050 };
0051
0052 void psp_set_sev_irq_handler(struct psp_device *psp, psp_irq_handler_t handler,
0053                  void *data);
0054 void psp_clear_sev_irq_handler(struct psp_device *psp);
0055
0056 void psp_set_tee_irq_handler(struct psp_device *psp, psp_irq_handler_t handler,
0057                  void *data);
0058 void psp_clear_tee_irq_handler(struct psp_device *psp);
0059
0060 struct psp_device *psp_get_master_device(void);
0061
0062 #define PSP_CAPABILITY_SEV          BIT(0)
0063 #define PSP_CAPABILITY_TEE          BIT(1)
0064 #define PSP_CAPABILITY_PSP_SECURITY_REPORTING   BIT(7)
0065
0066 #define PSP_CAPABILITY_PSP_SECURITY_OFFSET  8
0067 /*
0068  * The PSP doesn't directly store these bits in the capability register
0069  * but instead copies them from the results of query command.
0070  *
0071  * The offsets from the query command are below, and shifted when used.
0072  */
0073 #define PSP_SECURITY_FUSED_PART         BIT(0)
0074 #define PSP_SECURITY_DEBUG_LOCK_ON      BIT(2)
0075 #define PSP_SECURITY_TSME_STATUS        BIT(5)
0076 #define PSP_SECURITY_ANTI_ROLLBACK_STATUS   BIT(7)
0077 #define PSP_SECURITY_RPMC_PRODUCTION_ENABLED    BIT(8)
0078 #define PSP_SECURITY_RPMC_SPIROM_AVAILABLE  BIT(9)
0079 #define PSP_SECURITY_HSP_TPM_AVAILABLE      BIT(10)
0080 #define PSP_SECURITY_ROM_ARMOR_ENFORCED     BIT(11)
0081
0082 #endif /* __PSP_DEV_H */