cavium/cpt/request_manager.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2016 Cavium, Inc.
0004  */
0005
0006 #ifndef __REQUEST_MANAGER_H
0007 #define __REQUEST_MANAGER_H
0008
0009 #include "cpt_common.h"
0010
0011 #define TIME_IN_RESET_COUNT  5
0012 #define COMPLETION_CODE_SIZE 8
0013 #define COMPLETION_CODE_INIT 0
0014 #define PENDING_THOLD  100
0015 #define MAX_SG_IN_CNT 12
0016 #define MAX_SG_OUT_CNT 13
0017 #define SG_LIST_HDR_SIZE  8
0018 #define MAX_BUF_CNT 16
0019
0020 union ctrl_info {
0021     u32 flags;
0022     struct {
0023 #if defined(__BIG_ENDIAN_BITFIELD)
0024         u32 reserved0:26;
0025         u32 grp:3; /* Group bits */
0026         u32 dma_mode:2; /* DMA mode */
0027         u32 se_req:1;/* To SE core */
0028 #else
0029         u32 se_req:1; /* To SE core */
0030         u32 dma_mode:2; /* DMA mode */
0031         u32 grp:3; /* Group bits */
0032         u32 reserved0:26;
0033 #endif
0034     } s;
0035 };
0036
0037 union opcode_info {
0038     u16 flags;
0039     struct {
0040         u8 major;
0041         u8 minor;
0042     } s;
0043 };
0044
0045 struct cptvf_request {
0046     union opcode_info opcode;
0047     u16 param1;
0048     u16 param2;
0049     u16 dlen;
0050 };
0051
0052 struct buf_ptr {
0053     u8 *vptr;
0054     dma_addr_t dma_addr;
0055     u16 size;
0056 };
0057
0058 struct cpt_request_info {
0059     u8 incnt; /* Number of input buffers */
0060     u8 outcnt; /* Number of output buffers */
0061     u16 rlen; /* Output length */
0062     union ctrl_info ctrl; /* User control information */
0063     struct cptvf_request req; /* Request Information (Core specific) */
0064
0065     bool may_sleep;
0066
0067     struct buf_ptr in[MAX_BUF_CNT];
0068     struct buf_ptr out[MAX_BUF_CNT];
0069
0070     void (*callback)(int, void *); /* Kernel ASYNC request callabck */
0071     void *callback_arg; /* Kernel ASYNC request callabck arg */
0072 };
0073
0074 struct sglist_component {
0075     union {
0076         u64 len;
0077         struct {
0078             __be16 len0;
0079             __be16 len1;
0080             __be16 len2;
0081             __be16 len3;
0082         } s;
0083     } u;
0084     __be64 ptr0;
0085     __be64 ptr1;
0086     __be64 ptr2;
0087     __be64 ptr3;
0088 };
0089
0090 struct cpt_info_buffer {
0091     struct cpt_vf *cptvf;
0092     unsigned long time_in;
0093     u8 extra_time;
0094
0095     struct cpt_request_info *req;
0096     dma_addr_t dptr_baddr;
0097     u32 dlen;
0098     dma_addr_t rptr_baddr;
0099     dma_addr_t comp_baddr;
0100     u8 *in_buffer;
0101     u8 *out_buffer;
0102     u8 *gather_components;
0103     u8 *scatter_components;
0104
0105     struct pending_entry *pentry;
0106     volatile u64 *completion_addr;
0107     volatile u64 *alternate_caddr;
0108 };
0109
0110 /*
0111  * CPT_INST_S software command definitions
0112  * Words EI (0-3)
0113  */
0114 union vq_cmd_word0 {
0115     u64 u64;
0116     struct {
0117         __be16 opcode;
0118         __be16 param1;
0119         __be16 param2;
0120         __be16 dlen;
0121     } s;
0122 };
0123
0124 union vq_cmd_word3 {
0125     u64 u64;
0126     struct {
0127 #if defined(__BIG_ENDIAN_BITFIELD)
0128         u64 grp:3;
0129         u64 cptr:61;
0130 #else
0131         u64 cptr:61;
0132         u64 grp:3;
0133 #endif
0134     } s;
0135 };
0136
0137 struct cpt_vq_command {
0138     union vq_cmd_word0 cmd;
0139     u64 dptr;
0140     u64 rptr;
0141     union vq_cmd_word3 cptr;
0142 };
0143
0144 void vq_post_process(struct cpt_vf *cptvf, u32 qno);
0145 int process_request(struct cpt_vf *cptvf, struct cpt_request_info *req);
0146 #endif /* __REQUEST_MANAGER_H */