crypto/caam/error.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * CAAM Error Reporting
0004  *
0005  * Copyright 2009-2011 Freescale Semiconductor, Inc.
0006  */
0007
0008 #include "compat.h"
0009 #include "regs.h"
0010 #include "desc.h"
0011 #include "error.h"
0012
0013 #ifdef DEBUG
0014 #include <linux/highmem.h>
0015
0016 void caam_dump_sg(const char *prefix_str, int prefix_type,
0017           int rowsize, int groupsize, struct scatterlist *sg,
0018           size_t tlen, bool ascii)
0019 {
0020     struct scatterlist *it;
0021     void *it_page;
0022     size_t len;
0023     void *buf;
0024
0025     for (it = sg; it && tlen > 0 ; it = sg_next(it)) {
0026         /*
0027          * make sure the scatterlist's page
0028          * has a valid virtual memory mapping
0029          */
0030         it_page = kmap_atomic(sg_page(it));
0031         if (unlikely(!it_page)) {
0032             pr_err("caam_dump_sg: kmap failed\n");
0033             return;
0034         }
0035
0036         buf = it_page + it->offset;
0037         len = min_t(size_t, tlen, it->length);
0038         print_hex_dump_debug(prefix_str, prefix_type, rowsize,
0039                      groupsize, buf, len, ascii);
0040         tlen -= len;
0041
0042         kunmap_atomic(it_page);
0043     }
0044 }
0045 #else
0046 void caam_dump_sg(const char *prefix_str, int prefix_type,
0047           int rowsize, int groupsize, struct scatterlist *sg,
0048           size_t tlen, bool ascii)
0049 {}
0050 #endif /* DEBUG */
0051 EXPORT_SYMBOL(caam_dump_sg);
0052
0053 bool caam_little_end;
0054 EXPORT_SYMBOL(caam_little_end);
0055
0056 bool caam_imx;
0057 EXPORT_SYMBOL(caam_imx);
0058
0059 size_t caam_ptr_sz;
0060 EXPORT_SYMBOL(caam_ptr_sz);
0061
0062 static const struct {
0063     u8 value;
0064     const char *error_text;
0065 } desc_error_list[] = {
0066     { 0x00, "No error." },
0067     { 0x01, "SGT Length Error. The descriptor is trying to read more data than is contained in the SGT table." },
0068     { 0x02, "SGT Null Entry Error." },
0069     { 0x03, "Job Ring Control Error. There is a bad value in the Job Ring Control register." },
0070     { 0x04, "Invalid Descriptor Command. The Descriptor Command field is invalid." },
0071     { 0x05, "Reserved." },
0072     { 0x06, "Invalid KEY Command" },
0073     { 0x07, "Invalid LOAD Command" },
0074     { 0x08, "Invalid STORE Command" },
0075     { 0x09, "Invalid OPERATION Command" },
0076     { 0x0A, "Invalid FIFO LOAD Command" },
0077     { 0x0B, "Invalid FIFO STORE Command" },
0078     { 0x0C, "Invalid MOVE/MOVE_LEN Command" },
0079     { 0x0D, "Invalid JUMP Command. A nonlocal JUMP Command is invalid because the target is not a Job Header Command, or the jump is from a Trusted Descriptor to a Job Descriptor, or because the target Descriptor contains a Shared Descriptor." },
0080     { 0x0E, "Invalid MATH Command" },
0081     { 0x0F, "Invalid SIGNATURE Command" },
0082     { 0x10, "Invalid Sequence Command. A SEQ IN PTR OR SEQ OUT PTR Command is invalid or a SEQ KEY, SEQ LOAD, SEQ FIFO LOAD, or SEQ FIFO STORE decremented the input or output sequence length below 0. This error may result if a built-in PROTOCOL Command has encountered a malformed PDU." },
0083     { 0x11, "Skip data type invalid. The type must be 0xE or 0xF."},
0084     { 0x12, "Shared Descriptor Header Error" },
0085     { 0x13, "Header Error. Invalid length or parity, or certain other problems." },
0086     { 0x14, "Burster Error. Burster has gotten to an illegal state" },
0087     { 0x15, "Context Register Length Error. The descriptor is trying to read or write past the end of the Context Register. A SEQ LOAD or SEQ STORE with the VLF bit set was executed with too large a length in the variable length register (VSOL for SEQ STORE or VSIL for SEQ LOAD)." },
0088     { 0x16, "DMA Error" },
0089     { 0x17, "Reserved." },
0090     { 0x1A, "Job failed due to JR reset" },
0091     { 0x1B, "Job failed due to Fail Mode" },
0092     { 0x1C, "DECO Watchdog timer timeout error" },
0093     { 0x1D, "DECO tried to copy a key from another DECO but the other DECO's Key Registers were locked" },
0094     { 0x1E, "DECO attempted to copy data from a DECO that had an unmasked Descriptor error" },
0095     { 0x1F, "LIODN error. DECO was trying to share from itself or from another DECO but the two Non-SEQ LIODN values didn't match or the 'shared from' DECO's Descriptor required that the SEQ LIODNs be the same and they aren't." },
0096     { 0x20, "DECO has completed a reset initiated via the DRR register" },
0097     { 0x21, "Nonce error. When using EKT (CCM) key encryption option in the FIFO STORE Command, the Nonce counter reached its maximum value and this encryption mode can no longer be used." },
0098     { 0x22, "Meta data is too large (> 511 bytes) for TLS decap (input frame; block ciphers) and IPsec decap (output frame, when doing the next header byte update) and DCRC (output frame)." },
0099     { 0x23, "Read Input Frame error" },
0100     { 0x24, "JDKEK, TDKEK or TDSK not loaded error" },
0101     { 0x80, "DNR (do not run) error" },
0102     { 0x81, "undefined protocol command" },
0103     { 0x82, "invalid setting in PDB" },
0104     { 0x83, "Anti-replay LATE error" },
0105     { 0x84, "Anti-replay REPLAY error" },
0106     { 0x85, "Sequence number overflow" },
0107     { 0x86, "Sigver invalid signature" },
0108     { 0x87, "DSA Sign Illegal test descriptor" },
0109     { 0x88, "Protocol Format Error - A protocol has seen an error in the format of data received. When running RSA, this means that formatting with random padding was used, and did not follow the form: 0x00, 0x02, 8-to-N bytes of non-zero pad, 0x00, F data." },
0110     { 0x89, "Protocol Size Error - A protocol has seen an error in size. When running RSA, pdb size N < (size of F) when no formatting is used; or pdb size N < (F + 11) when formatting is used." },
0111     { 0xC1, "Blob Command error: Undefined mode" },
0112     { 0xC2, "Blob Command error: Secure Memory Blob mode error" },
0113     { 0xC4, "Blob Command error: Black Blob key or input size error" },
0114     { 0xC5, "Blob Command error: Invalid key destination" },
0115     { 0xC8, "Blob Command error: Trusted/Secure mode error" },
0116     { 0xF0, "IPsec TTL or hop limit field either came in as 0, or was decremented to 0" },
0117     { 0xF1, "3GPP HFN matches or exceeds the Threshold" },
0118 };
0119
0120 static const struct {
0121     u8 value;
0122     const char *error_text;
0123 } qi_error_list[] = {
0124     { 0x00, "No error" },
0125     { 0x1F, "Job terminated by FQ or ICID flush" },
0126     { 0x20, "FD format error"},
0127     { 0x21, "FD command format error"},
0128     { 0x23, "FL format error"},
0129     { 0x25, "CRJD specified in FD, but not enabled in FLC"},
0130     { 0x30, "Max. buffer size too small"},
0131     { 0x31, "DHR exceeds max. buffer size (allocate mode, S/G format)"},
0132     { 0x32, "SGT exceeds max. buffer size (allocate mode, S/G format"},
0133     { 0x33, "Size over/underflow (allocate mode)"},
0134     { 0x34, "Size over/underflow (reuse mode)"},
0135     { 0x35, "Length exceeds max. short length (allocate mode, S/G/ format)"},
0136     { 0x36, "Memory footprint exceeds max. value (allocate mode, S/G/ format)"},
0137     { 0x41, "SBC frame format not supported (allocate mode)"},
0138     { 0x42, "Pool 0 invalid / pool 1 size < pool 0 size (allocate mode)"},
0139     { 0x43, "Annotation output enabled but ASAR = 0 (allocate mode)"},
0140     { 0x44, "Unsupported or reserved frame format or SGHR = 1 (reuse mode)"},
0141     { 0x45, "DHR correction underflow (reuse mode, single buffer format)"},
0142     { 0x46, "Annotation length exceeds offset (reuse mode)"},
0143     { 0x48, "Annotation output enabled but ASA limited by ASAR (reuse mode)"},
0144     { 0x49, "Data offset correction exceeds input frame data length (reuse mode)"},
0145     { 0x4B, "Annotation output enabled but ASA cannot be expanded (frame list)"},
0146     { 0x51, "Unsupported IF reuse mode"},
0147     { 0x52, "Unsupported FL use mode"},
0148     { 0x53, "Unsupported RJD use mode"},
0149     { 0x54, "Unsupported inline descriptor use mode"},
0150     { 0xC0, "Table buffer pool 0 depletion"},
0151     { 0xC1, "Table buffer pool 1 depletion"},
0152     { 0xC2, "Data buffer pool 0 depletion, no OF allocated"},
0153     { 0xC3, "Data buffer pool 1 depletion, no OF allocated"},
0154     { 0xC4, "Data buffer pool 0 depletion, partial OF allocated"},
0155     { 0xC5, "Data buffer pool 1 depletion, partial OF allocated"},
0156     { 0xD0, "FLC read error"},
0157     { 0xD1, "FL read error"},
0158     { 0xD2, "FL write error"},
0159     { 0xD3, "OF SGT write error"},
0160     { 0xD4, "PTA read error"},
0161     { 0xD5, "PTA write error"},
0162     { 0xD6, "OF SGT F-bit write error"},
0163     { 0xD7, "ASA write error"},
0164     { 0xE1, "FLC[ICR]=0 ICID error"},
0165     { 0xE2, "FLC[ICR]=1 ICID error"},
0166     { 0xE4, "source of ICID flush not trusted (BDI = 0)"},
0167 };
0168
0169 static const char * const cha_id_list[] = {
0170     "",
0171     "AES",
0172     "DES",
0173     "ARC4",
0174     "MDHA",
0175     "RNG",
0176     "SNOW f8",
0177     "Kasumi f8/9",
0178     "PKHA",
0179     "CRCA",
0180     "SNOW f9",
0181     "ZUCE",
0182     "ZUCA",
0183 };
0184
0185 static const char * const err_id_list[] = {
0186     "No error.",
0187     "Mode error.",
0188     "Data size error.",
0189     "Key size error.",
0190     "PKHA A memory size error.",
0191     "PKHA B memory size error.",
0192     "Data arrived out of sequence error.",
0193     "PKHA divide-by-zero error.",
0194     "PKHA modulus even error.",
0195     "DES key parity error.",
0196     "ICV check failed.",
0197     "Hardware error.",
0198     "Unsupported CCM AAD size.",
0199     "Class 1 CHA is not reset",
0200     "Invalid CHA combination was selected",
0201     "Invalid CHA selected.",
0202 };
0203
0204 static const char * const rng_err_id_list[] = {
0205     "",
0206     "",
0207     "",
0208     "Instantiate",
0209     "Not instantiated",
0210     "Test instantiate",
0211     "Prediction resistance",
0212     "Prediction resistance and test request",
0213     "Uninstantiate",
0214     "Secure key generation",
0215     "",
0216     "Hardware error",
0217     "Continuous check"
0218 };
0219
0220 static int report_ccb_status(struct device *jrdev, const u32 status,
0221                  const char *error)
0222 {
0223     u8 cha_id = (status & JRSTA_CCBERR_CHAID_MASK) >>
0224             JRSTA_CCBERR_CHAID_SHIFT;
0225     u8 err_id = status & JRSTA_CCBERR_ERRID_MASK;
0226     u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
0227           JRSTA_DECOERR_INDEX_SHIFT;
0228     char *idx_str;
0229     const char *cha_str = "unidentified cha_id value 0x";
0230     char cha_err_code[3] = { 0 };
0231     const char *err_str = "unidentified err_id value 0x";
0232     char err_err_code[3] = { 0 };
0233
0234     if (status & JRSTA_DECOERR_JUMP)
0235         idx_str = "jump tgt desc idx";
0236     else
0237         idx_str = "desc idx";
0238
0239     if (cha_id < ARRAY_SIZE(cha_id_list))
0240         cha_str = cha_id_list[cha_id];
0241     else
0242         snprintf(cha_err_code, sizeof(cha_err_code), "%02x", cha_id);
0243
0244     if ((cha_id << JRSTA_CCBERR_CHAID_SHIFT) == JRSTA_CCBERR_CHAID_RNG &&
0245         err_id < ARRAY_SIZE(rng_err_id_list) &&
0246         strlen(rng_err_id_list[err_id])) {
0247         /* RNG-only error */
0248         err_str = rng_err_id_list[err_id];
0249     } else {
0250         err_str = err_id_list[err_id];
0251     }
0252
0253     /*
0254      * CCB ICV check failures are part of normal operation life;
0255      * we leave the upper layers to do what they want with them.
0256      */
0257     if (err_id == JRSTA_CCBERR_ERRID_ICVCHK)
0258         return -EBADMSG;
0259
0260     dev_err_ratelimited(jrdev, "%08x: %s: %s %d: %s%s: %s%s\n", status,
0261                 error, idx_str, idx, cha_str, cha_err_code,
0262                 err_str, err_err_code);
0263
0264     return -EINVAL;
0265 }
0266
0267 static int report_jump_status(struct device *jrdev, const u32 status,
0268                   const char *error)
0269 {
0270     dev_err(jrdev, "%08x: %s: %s() not implemented\n",
0271         status, error, __func__);
0272
0273     return -EINVAL;
0274 }
0275
0276 static int report_deco_status(struct device *jrdev, const u32 status,
0277                   const char *error)
0278 {
0279     u8 err_id = status & JRSTA_DECOERR_ERROR_MASK;
0280     u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
0281           JRSTA_DECOERR_INDEX_SHIFT;
0282     char *idx_str;
0283     const char *err_str = "unidentified error value 0x";
0284     char err_err_code[3] = { 0 };
0285     int i;
0286
0287     if (status & JRSTA_DECOERR_JUMP)
0288         idx_str = "jump tgt desc idx";
0289     else
0290         idx_str = "desc idx";
0291
0292     for (i = 0; i < ARRAY_SIZE(desc_error_list); i++)
0293         if (desc_error_list[i].value == err_id)
0294             break;
0295
0296     if (i != ARRAY_SIZE(desc_error_list) && desc_error_list[i].error_text)
0297         err_str = desc_error_list[i].error_text;
0298     else
0299         snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
0300
0301     dev_err(jrdev, "%08x: %s: %s %d: %s%s\n",
0302         status, error, idx_str, idx, err_str, err_err_code);
0303
0304     return -EINVAL;
0305 }
0306
0307 static int report_qi_status(struct device *qidev, const u32 status,
0308                 const char *error)
0309 {
0310     u8 err_id = status & JRSTA_QIERR_ERROR_MASK;
0311     const char *err_str = "unidentified error value 0x";
0312     char err_err_code[3] = { 0 };
0313     int i;
0314
0315     for (i = 0; i < ARRAY_SIZE(qi_error_list); i++)
0316         if (qi_error_list[i].value == err_id)
0317             break;
0318
0319     if (i != ARRAY_SIZE(qi_error_list) && qi_error_list[i].error_text)
0320         err_str = qi_error_list[i].error_text;
0321     else
0322         snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
0323
0324     dev_err(qidev, "%08x: %s: %s%s\n",
0325         status, error, err_str, err_err_code);
0326
0327     return -EINVAL;
0328 }
0329
0330 static int report_jr_status(struct device *jrdev, const u32 status,
0331                 const char *error)
0332 {
0333     dev_err(jrdev, "%08x: %s: %s() not implemented\n",
0334         status, error, __func__);
0335
0336     return -EINVAL;
0337 }
0338
0339 static int report_cond_code_status(struct device *jrdev, const u32 status,
0340                    const char *error)
0341 {
0342     dev_err(jrdev, "%08x: %s: %s() not implemented\n",
0343         status, error, __func__);
0344
0345     return -EINVAL;
0346 }
0347
0348 int caam_strstatus(struct device *jrdev, u32 status, bool qi_v2)
0349 {
0350     static const struct stat_src {
0351         int (*report_ssed)(struct device *jrdev, const u32 status,
0352                    const char *error);
0353         const char *error;
0354     } status_src[16] = {
0355         { NULL, "No error" },
0356         { NULL, NULL },
0357         { report_ccb_status, "CCB" },
0358         { report_jump_status, "Jump" },
0359         { report_deco_status, "DECO" },
0360         { report_qi_status, "Queue Manager Interface" },
0361         { report_jr_status, "Job Ring" },
0362         { report_cond_code_status, "Condition Code" },
0363         { NULL, NULL },
0364         { NULL, NULL },
0365         { NULL, NULL },
0366         { NULL, NULL },
0367         { NULL, NULL },
0368         { NULL, NULL },
0369         { NULL, NULL },
0370         { NULL, NULL },
0371     };
0372     u32 ssrc = status >> JRSTA_SSRC_SHIFT;
0373     const char *error = status_src[ssrc].error;
0374
0375     /*
0376      * If there is an error handling function, call it to report the error.
0377      * Otherwise print the error source name.
0378      */
0379     if (status_src[ssrc].report_ssed)
0380         return status_src[ssrc].report_ssed(jrdev, status, error);
0381
0382     if (error)
0383         dev_err(jrdev, "%d: %s\n", ssrc, error);
0384     else
0385         dev_err(jrdev, "%d: unknown error source\n", ssrc);
0386
0387     return -EINVAL;
0388 }
0389 EXPORT_SYMBOL(caam_strstatus);
0390
0391 MODULE_LICENSE("GPL");
0392 MODULE_DESCRIPTION("FSL CAAM error reporting");
0393 MODULE_AUTHOR("Freescale Semiconductor");