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0001 /* SPDX-License-Identifier: GPL-2.0 */ 0002 /* 0003 * caam - Freescale FSL CAAM support for Public Key Cryptography descriptors 0004 * 0005 * Copyright 2016 Freescale Semiconductor, Inc. 0006 * 0007 * There is no Shared Descriptor for PKC so that the Job Descriptor must carry 0008 * all the desired key parameters, input and output pointers. 0009 */ 0010 0011 #ifndef _PKC_DESC_H_ 0012 #define _PKC_DESC_H_ 0013 #include "compat.h" 0014 #include "pdb.h" 0015 #include <crypto/engine.h> 0016 0017 /** 0018 * caam_priv_key_form - CAAM RSA private key representation 0019 * CAAM RSA private key may have either of three forms. 0020 * 0021 * 1. The first representation consists of the pair (n, d), where the 0022 * components have the following meanings: 0023 * n the RSA modulus 0024 * d the RSA private exponent 0025 * 0026 * 2. The second representation consists of the triplet (p, q, d), where the 0027 * components have the following meanings: 0028 * p the first prime factor of the RSA modulus n 0029 * q the second prime factor of the RSA modulus n 0030 * d the RSA private exponent 0031 * 0032 * 3. The third representation consists of the quintuple (p, q, dP, dQ, qInv), 0033 * where the components have the following meanings: 0034 * p the first prime factor of the RSA modulus n 0035 * q the second prime factor of the RSA modulus n 0036 * dP the first factors's CRT exponent 0037 * dQ the second factors's CRT exponent 0038 * qInv the (first) CRT coefficient 0039 * 0040 * The benefit of using the third or the second key form is lower computational 0041 * cost for the decryption and signature operations. 0042 */ 0043 enum caam_priv_key_form { 0044 FORM1, 0045 FORM2, 0046 FORM3 0047 }; 0048 0049 /** 0050 * caam_rsa_key - CAAM RSA key structure. Keys are allocated in DMA zone. 0051 * @n : RSA modulus raw byte stream 0052 * @e : RSA public exponent raw byte stream 0053 * @d : RSA private exponent raw byte stream 0054 * @p : RSA prime factor p of RSA modulus n 0055 * @q : RSA prime factor q of RSA modulus n 0056 * @dp : RSA CRT exponent of p 0057 * @dp : RSA CRT exponent of q 0058 * @qinv : RSA CRT coefficient 0059 * @tmp1 : CAAM uses this temporary buffer as internal state buffer. 0060 * It is assumed to be as long as p. 0061 * @tmp2 : CAAM uses this temporary buffer as internal state buffer. 0062 * It is assumed to be as long as q. 0063 * @n_sz : length in bytes of RSA modulus n 0064 * @e_sz : length in bytes of RSA public exponent 0065 * @d_sz : length in bytes of RSA private exponent 0066 * @p_sz : length in bytes of RSA prime factor p of RSA modulus n 0067 * @q_sz : length in bytes of RSA prime factor q of RSA modulus n 0068 * @priv_form : CAAM RSA private key representation 0069 */ 0070 struct caam_rsa_key { 0071 u8 *n; 0072 u8 *e; 0073 u8 *d; 0074 u8 *p; 0075 u8 *q; 0076 u8 *dp; 0077 u8 *dq; 0078 u8 *qinv; 0079 u8 *tmp1; 0080 u8 *tmp2; 0081 size_t n_sz; 0082 size_t e_sz; 0083 size_t d_sz; 0084 size_t p_sz; 0085 size_t q_sz; 0086 enum caam_priv_key_form priv_form; 0087 }; 0088 0089 /** 0090 * caam_rsa_ctx - per session context. 0091 * @enginectx : crypto engine context 0092 * @key : RSA key in DMA zone 0093 * @dev : device structure 0094 * @padding_dma : dma address of padding, for adding it to the input 0095 */ 0096 struct caam_rsa_ctx { 0097 struct crypto_engine_ctx enginectx; 0098 struct caam_rsa_key key; 0099 struct device *dev; 0100 dma_addr_t padding_dma; 0101 0102 }; 0103 0104 /** 0105 * caam_rsa_req_ctx - per request context. 0106 * @src : input scatterlist (stripped of leading zeros) 0107 * @fixup_src : input scatterlist (that might be stripped of leading zeros) 0108 * @fixup_src_len : length of the fixup_src input scatterlist 0109 * @edesc : s/w-extended rsa descriptor 0110 * @akcipher_op_done : callback used when operation is done 0111 */ 0112 struct caam_rsa_req_ctx { 0113 struct scatterlist src[2]; 0114 struct scatterlist *fixup_src; 0115 unsigned int fixup_src_len; 0116 struct rsa_edesc *edesc; 0117 void (*akcipher_op_done)(struct device *jrdev, u32 *desc, u32 err, 0118 void *context); 0119 }; 0120 0121 /** 0122 * rsa_edesc - s/w-extended rsa descriptor 0123 * @src_nents : number of segments in input s/w scatterlist 0124 * @dst_nents : number of segments in output s/w scatterlist 0125 * @mapped_src_nents: number of segments in input h/w link table 0126 * @mapped_dst_nents: number of segments in output h/w link table 0127 * @sec4_sg_bytes : length of h/w link table 0128 * @bklog : stored to determine if the request needs backlog 0129 * @sec4_sg_dma : dma address of h/w link table 0130 * @sec4_sg : pointer to h/w link table 0131 * @pdb : specific RSA Protocol Data Block (PDB) 0132 * @hw_desc : descriptor followed by link tables if any 0133 */ 0134 struct rsa_edesc { 0135 int src_nents; 0136 int dst_nents; 0137 int mapped_src_nents; 0138 int mapped_dst_nents; 0139 int sec4_sg_bytes; 0140 bool bklog; 0141 dma_addr_t sec4_sg_dma; 0142 struct sec4_sg_entry *sec4_sg; 0143 union { 0144 struct rsa_pub_pdb pub; 0145 struct rsa_priv_f1_pdb priv_f1; 0146 struct rsa_priv_f2_pdb priv_f2; 0147 struct rsa_priv_f3_pdb priv_f3; 0148 } pdb; 0149 u32 hw_desc[]; 0150 }; 0151 0152 /* Descriptor construction primitives. */ 0153 void init_rsa_pub_desc(u32 *desc, struct rsa_pub_pdb *pdb); 0154 void init_rsa_priv_f1_desc(u32 *desc, struct rsa_priv_f1_pdb *pdb); 0155 void init_rsa_priv_f2_desc(u32 *desc, struct rsa_priv_f2_pdb *pdb); 0156 void init_rsa_priv_f3_desc(u32 *desc, struct rsa_priv_f3_pdb *pdb); 0157 0158 #endif
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