0001 # SPDX-License-Identifier: GPL-2.0
0002 config CRYPTO_DEV_FSL_CAAM_COMMON
0003 tristate
0004
0005 config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
0006 tristate
0007
0008 config CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC
0009 tristate
0010
0011 config CRYPTO_DEV_FSL_CAAM
0012 tristate "Freescale CAAM-Multicore platform driver backend"
0013 depends on FSL_SOC || ARCH_MXC || ARCH_LAYERSCAPE
0014 select SOC_BUS
0015 select CRYPTO_DEV_FSL_CAAM_COMMON
0016 imply FSL_MC_BUS
0017 help
0018 Enables the driver module for Freescale's Cryptographic Accelerator
0019 and Assurance Module (CAAM), also known as the SEC version 4 (SEC4).
0020 This module creates job ring devices, and configures h/w
0021 to operate as a DPAA component automatically, depending
0022 on h/w feature availability.
0023
0024 To compile this driver as a module, choose M here: the module
0025 will be called caam.
0026
0027 if CRYPTO_DEV_FSL_CAAM
0028
0029 config CRYPTO_DEV_FSL_CAAM_DEBUG
0030 bool "Enable debug output in CAAM driver"
0031 help
0032 Selecting this will enable printing of various debug
0033 information in the CAAM driver.
0034
0035 menuconfig CRYPTO_DEV_FSL_CAAM_JR
0036 tristate "Freescale CAAM Job Ring driver backend"
0037 select CRYPTO_ENGINE
0038 default y
0039 help
0040 Enables the driver module for Job Rings which are part of
0041 Freescale's Cryptographic Accelerator
0042 and Assurance Module (CAAM). This module adds a job ring operation
0043 interface.
0044
0045 To compile this driver as a module, choose M here: the module
0046 will be called caam_jr.
0047
0048 if CRYPTO_DEV_FSL_CAAM_JR
0049
0050 config CRYPTO_DEV_FSL_CAAM_RINGSIZE
0051 int "Job Ring size"
0052 range 2 9
0053 default "9"
0054 help
0055 Select size of Job Rings as a power of 2, within the
0056 range 2-9 (ring size 4-512).
0057 Examples:
0058 2 => 4
0059 3 => 8
0060 4 => 16
0061 5 => 32
0062 6 => 64
0063 7 => 128
0064 8 => 256
0065 9 => 512
0066
0067 config CRYPTO_DEV_FSL_CAAM_INTC
0068 bool "Job Ring interrupt coalescing"
0069 help
0070 Enable the Job Ring's interrupt coalescing feature.
0071
0072 Note: the driver already provides adequate
0073 interrupt coalescing in software.
0074
0075 config CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD
0076 int "Job Ring interrupt coalescing count threshold"
0077 depends on CRYPTO_DEV_FSL_CAAM_INTC
0078 range 1 255
0079 default 255
0080 help
0081 Select number of descriptor completions to queue before
0082 raising an interrupt, in the range 1-255. Note that a selection
0083 of 1 functionally defeats the coalescing feature, and a selection
0084 equal or greater than the job ring size will force timeouts.
0085
0086 config CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD
0087 int "Job Ring interrupt coalescing timer threshold"
0088 depends on CRYPTO_DEV_FSL_CAAM_INTC
0089 range 1 65535
0090 default 2048
0091 help
0092 Select number of bus clocks/64 to timeout in the case that one or
0093 more descriptor completions are queued without reaching the count
0094 threshold. Range is 1-65535.
0095
0096 config CRYPTO_DEV_FSL_CAAM_CRYPTO_API
0097 bool "Register algorithm implementations with the Crypto API"
0098 default y
0099 select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
0100 select CRYPTO_AEAD
0101 select CRYPTO_AUTHENC
0102 select CRYPTO_SKCIPHER
0103 select CRYPTO_LIB_DES
0104 select CRYPTO_XTS
0105 help
0106 Selecting this will offload crypto for users of the
0107 scatterlist crypto API (such as the linux native IPSec
0108 stack) to the SEC4 via job ring.
0109
0110 config CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI
0111 bool "Queue Interface as Crypto API backend"
0112 depends on FSL_DPAA && NET
0113 default y
0114 select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
0115 select CRYPTO_AUTHENC
0116 select CRYPTO_SKCIPHER
0117 select CRYPTO_DES
0118 select CRYPTO_XTS
0119 help
0120 Selecting this will use CAAM Queue Interface (QI) for sending
0121 & receiving crypto jobs to/from CAAM. This gives better performance
0122 than job ring interface when the number of cores are more than the
0123 number of job rings assigned to the kernel. The number of portals
0124 assigned to the kernel should also be more than the number of
0125 job rings.
0126
0127 config CRYPTO_DEV_FSL_CAAM_AHASH_API
0128 bool "Register hash algorithm implementations with Crypto API"
0129 default y
0130 select CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC
0131 select CRYPTO_HASH
0132 help
0133 Selecting this will offload ahash for users of the
0134 scatterlist crypto API to the SEC4 via job ring.
0135
0136 config CRYPTO_DEV_FSL_CAAM_PKC_API
0137 bool "Register public key cryptography implementations with Crypto API"
0138 default y
0139 select CRYPTO_RSA
0140 help
0141 Selecting this will allow SEC Public key support for RSA.
0142 Supported cryptographic primitives: encryption, decryption,
0143 signature and verification.
0144
0145 config CRYPTO_DEV_FSL_CAAM_RNG_API
0146 bool "Register caam device for hwrng API"
0147 default y
0148 select CRYPTO_RNG
0149 select HW_RANDOM
0150 help
0151 Selecting this will register the SEC4 hardware rng to
0152 the hw_random API for supplying the kernel entropy pool.
0153
0154 config CRYPTO_DEV_FSL_CAAM_PRNG_API
0155 bool "Register Pseudo random number generation implementation with Crypto API"
0156 default y
0157 select CRYPTO_RNG
0158 help
0159 Selecting this will register the SEC hardware prng to
0160 the Crypto API.
0161
0162 config CRYPTO_DEV_FSL_CAAM_BLOB_GEN
0163 bool
0164
0165 endif # CRYPTO_DEV_FSL_CAAM_JR
0166
0167 endif # CRYPTO_DEV_FSL_CAAM
0168
0169 config CRYPTO_DEV_FSL_DPAA2_CAAM
0170 tristate "QorIQ DPAA2 CAAM (DPSECI) driver"
0171 depends on FSL_MC_DPIO
0172 depends on NETDEVICES
0173 select CRYPTO_DEV_FSL_CAAM_COMMON
0174 select CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC
0175 select CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC
0176 select CRYPTO_SKCIPHER
0177 select CRYPTO_AUTHENC
0178 select CRYPTO_AEAD
0179 select CRYPTO_HASH
0180 select CRYPTO_DES
0181 select CRYPTO_XTS
0182 help
0183 CAAM driver for QorIQ Data Path Acceleration Architecture 2.
0184 It handles DPSECI DPAA2 objects that sit on the Management Complex
0185 (MC) fsl-mc bus.
0186
0187 To compile this as a module, choose M here: the module
0188 will be called dpaa2_caam.
