crypto/amcc/crypto4xx_core.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * AMCC SoC PPC4xx Crypto Driver
0004  *
0005  * Copyright (c) 2008 Applied Micro Circuits Corporation.
0006  * All rights reserved. James Hsiao <jhsiao@amcc.com>
0007  *
0008  * This is the header file for AMCC Crypto offload Linux device driver for
0009  * use with Linux CryptoAPI.
0010
0011  */
0012
0013 #ifndef __CRYPTO4XX_CORE_H__
0014 #define __CRYPTO4XX_CORE_H__
0015
0016 #include <linux/ratelimit.h>
0017 #include <linux/mutex.h>
0018 #include <linux/scatterlist.h>
0019 #include <crypto/internal/hash.h>
0020 #include <crypto/internal/aead.h>
0021 #include <crypto/internal/rng.h>
0022 #include <crypto/internal/skcipher.h>
0023 #include "crypto4xx_reg_def.h"
0024 #include "crypto4xx_sa.h"
0025
0026 #define PPC460SX_SDR0_SRST                      0x201
0027 #define PPC405EX_SDR0_SRST                      0x200
0028 #define PPC460EX_SDR0_SRST                      0x201
0029 #define PPC460EX_CE_RESET                       0x08000000
0030 #define PPC460SX_CE_RESET                       0x20000000
0031 #define PPC405EX_CE_RESET                       0x00000008
0032
0033 #define CRYPTO4XX_CRYPTO_PRIORITY       300
0034 #define PPC4XX_NUM_PD               256
0035 #define PPC4XX_LAST_PD              (PPC4XX_NUM_PD - 1)
0036 #define PPC4XX_NUM_GD               1024
0037 #define PPC4XX_LAST_GD              (PPC4XX_NUM_GD - 1)
0038 #define PPC4XX_NUM_SD               256
0039 #define PPC4XX_LAST_SD              (PPC4XX_NUM_SD - 1)
0040 #define PPC4XX_SD_BUFFER_SIZE           2048
0041
0042 #define PD_ENTRY_BUSY               BIT(1)
0043 #define PD_ENTRY_INUSE              BIT(0)
0044 #define PD_ENTRY_FREE               0
0045 #define ERING_WAS_FULL              0xffffffff
0046
0047 struct crypto4xx_device;
0048
0049 union shadow_sa_buf {
0050     struct dynamic_sa_ctl sa;
0051
0052     /* alloc 256 bytes which is enough for any kind of dynamic sa */
0053     u8 buf[256];
0054 } __packed;
0055
0056 struct pd_uinfo {
0057     struct crypto4xx_device *dev;
0058     u32   state;
0059     u32 first_gd;       /* first gather discriptor
0060                 used by this packet */
0061     u32 num_gd;             /* number of gather discriptor
0062                 used by this packet */
0063     u32 first_sd;       /* first scatter discriptor
0064                 used by this packet */
0065     u32 num_sd;     /* number of scatter discriptors
0066                 used by this packet */
0067     struct dynamic_sa_ctl *sa_va;   /* shadow sa */
0068     struct sa_state_record *sr_va;  /* state record for shadow sa */
0069     u32 sr_pa;
0070     struct scatterlist *dest_va;
0071     struct crypto_async_request *async_req;     /* base crypto request
0072                             for this packet */
0073 };
0074
0075 struct crypto4xx_device {
0076     struct crypto4xx_core_device *core_dev;
0077     void __iomem *ce_base;
0078     void __iomem *trng_base;
0079
0080     struct ce_pd *pdr;  /* base address of packet descriptor ring */
0081     dma_addr_t pdr_pa;  /* physical address of pdr_base_register */
0082     struct ce_gd *gdr;  /* gather descriptor ring */
0083     dma_addr_t gdr_pa;  /* physical address of gdr_base_register */
0084     struct ce_sd *sdr;  /* scatter descriptor ring */
0085     dma_addr_t sdr_pa;  /* physical address of sdr_base_register */
0086     void *scatter_buffer_va;
0087     dma_addr_t scatter_buffer_pa;
0088
0089     union shadow_sa_buf *shadow_sa_pool;
0090     dma_addr_t shadow_sa_pool_pa;
0091     struct sa_state_record *shadow_sr_pool;
0092     dma_addr_t shadow_sr_pool_pa;
0093     u32 pdr_tail;
0094     u32 pdr_head;
0095     u32 gdr_tail;
0096     u32 gdr_head;
0097     u32 sdr_tail;
0098     u32 sdr_head;
0099     struct pd_uinfo *pdr_uinfo;
0100     struct list_head alg_list;  /* List of algorithm supported
0101                     by this device */
0102     struct ratelimit_state aead_ratelimit;
0103     bool is_revb;
0104 };
0105
0106 struct crypto4xx_core_device {
0107     struct device *device;
0108     struct platform_device *ofdev;
0109     struct crypto4xx_device *dev;
0110     struct hwrng *trng;
0111     u32 int_status;
0112     u32 irq;
0113     struct tasklet_struct tasklet;
0114     spinlock_t lock;
0115     struct mutex rng_lock;
0116 };
0117
0118 struct crypto4xx_ctx {
0119     struct crypto4xx_device *dev;
0120     struct dynamic_sa_ctl *sa_in;
0121     struct dynamic_sa_ctl *sa_out;
0122     __le32 iv_nonce;
0123     u32 sa_len;
0124     union {
0125         struct crypto_sync_skcipher *cipher;
0126         struct crypto_aead *aead;
0127     } sw_cipher;
0128 };
0129
0130 struct crypto4xx_aead_reqctx {
0131     struct scatterlist dst[2];
0132 };
0133
0134 struct crypto4xx_alg_common {
0135     u32 type;
0136     union {
0137         struct skcipher_alg cipher;
0138         struct ahash_alg hash;
0139         struct aead_alg aead;
0140         struct rng_alg rng;
0141     } u;
0142 };
0143
0144 struct crypto4xx_alg {
0145     struct list_head  entry;
0146     struct crypto4xx_alg_common alg;
0147     struct crypto4xx_device *dev;
0148 };
0149
0150 int crypto4xx_alloc_sa(struct crypto4xx_ctx *ctx, u32 size);
0151 void crypto4xx_free_sa(struct crypto4xx_ctx *ctx);
0152 void crypto4xx_free_ctx(struct crypto4xx_ctx *ctx);
0153 int crypto4xx_build_pd(struct crypto_async_request *req,
0154                struct crypto4xx_ctx *ctx,
0155                struct scatterlist *src,
0156                struct scatterlist *dst,
0157                const unsigned int datalen,
0158                const __le32 *iv, const u32 iv_len,
0159                const struct dynamic_sa_ctl *sa,
0160                const unsigned int sa_len,
0161                const unsigned int assoclen,
0162                struct scatterlist *dst_tmp);
0163 int crypto4xx_setkey_aes_cbc(struct crypto_skcipher *cipher,
0164                  const u8 *key, unsigned int keylen);
0165 int crypto4xx_setkey_aes_cfb(struct crypto_skcipher *cipher,
0166                  const u8 *key, unsigned int keylen);
0167 int crypto4xx_setkey_aes_ctr(struct crypto_skcipher *cipher,
0168                  const u8 *key, unsigned int keylen);
0169 int crypto4xx_setkey_aes_ecb(struct crypto_skcipher *cipher,
0170                  const u8 *key, unsigned int keylen);
0171 int crypto4xx_setkey_aes_ofb(struct crypto_skcipher *cipher,
0172                  const u8 *key, unsigned int keylen);
0173 int crypto4xx_setkey_rfc3686(struct crypto_skcipher *cipher,
0174                  const u8 *key, unsigned int keylen);
0175 int crypto4xx_encrypt_ctr(struct skcipher_request *req);
0176 int crypto4xx_decrypt_ctr(struct skcipher_request *req);
0177 int crypto4xx_encrypt_iv_stream(struct skcipher_request *req);
0178 int crypto4xx_decrypt_iv_stream(struct skcipher_request *req);
0179 int crypto4xx_encrypt_iv_block(struct skcipher_request *req);
0180 int crypto4xx_decrypt_iv_block(struct skcipher_request *req);
0181 int crypto4xx_encrypt_noiv_block(struct skcipher_request *req);
0182 int crypto4xx_decrypt_noiv_block(struct skcipher_request *req);
0183 int crypto4xx_rfc3686_encrypt(struct skcipher_request *req);
0184 int crypto4xx_rfc3686_decrypt(struct skcipher_request *req);
0185 int crypto4xx_sha1_alg_init(struct crypto_tfm *tfm);
0186 int crypto4xx_hash_digest(struct ahash_request *req);
0187 int crypto4xx_hash_final(struct ahash_request *req);
0188 int crypto4xx_hash_update(struct ahash_request *req);
0189 int crypto4xx_hash_init(struct ahash_request *req);
0190
0191 /*
0192  * Note: Only use this function to copy items that is word aligned.
0193  */
0194 static inline void crypto4xx_memcpy_swab32(u32 *dst, const void *buf,
0195                        size_t len)
0196 {
0197     for (; len >= 4; buf += 4, len -= 4)
0198         *dst++ = __swab32p((u32 *) buf);
0199
0200     if (len) {
0201         const u8 *tmp = (u8 *)buf;
0202
0203         switch (len) {
0204         case 3:
0205             *dst = (tmp[2] << 16) |
0206                    (tmp[1] << 8) |
0207                    tmp[0];
0208             break;
0209         case 2:
0210             *dst = (tmp[1] << 8) |
0211                    tmp[0];
0212             break;
0213         case 1:
0214             *dst = tmp[0];
0215             break;
0216         default:
0217             break;
0218         }
0219     }
0220 }
0221
0222 static inline void crypto4xx_memcpy_from_le32(u32 *dst, const void *buf,
0223                           size_t len)
0224 {
0225     crypto4xx_memcpy_swab32(dst, buf, len);
0226 }
0227
0228 static inline void crypto4xx_memcpy_to_le32(__le32 *dst, const void *buf,
0229                         size_t len)
0230 {
0231     crypto4xx_memcpy_swab32((u32 *)dst, buf, len);
0232 }
0233
0234 int crypto4xx_setauthsize_aead(struct crypto_aead *ciper,
0235                    unsigned int authsize);
0236 int crypto4xx_setkey_aes_ccm(struct crypto_aead *cipher,
0237                  const u8 *key, unsigned int keylen);
0238 int crypto4xx_encrypt_aes_ccm(struct aead_request *req);
0239 int crypto4xx_decrypt_aes_ccm(struct aead_request *req);
0240 int crypto4xx_setkey_aes_gcm(struct crypto_aead *cipher,
0241                  const u8 *key, unsigned int keylen);
0242 int crypto4xx_encrypt_aes_gcm(struct aead_request *req);
0243 int crypto4xx_decrypt_aes_gcm(struct aead_request *req);
0244
0245 #endif