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0011 #include <linux/cpuidle.h>
0012 #include <linux/cpu_pm.h>
0013 #include <linux/export.h>
0014 #include <linux/init.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/of.h>
0017 #include <linux/platform_data/cpuidle-exynos.h>
0018
0019 #include <asm/suspend.h>
0020 #include <asm/cpuidle.h>
0021
0022 static atomic_t exynos_idle_barrier;
0023
0024 static struct cpuidle_exynos_data *exynos_cpuidle_pdata;
0025 static void (*exynos_enter_aftr)(void);
0026
0027 static int exynos_enter_coupled_lowpower(struct cpuidle_device *dev,
0028 struct cpuidle_driver *drv,
0029 int index)
0030 {
0031 int ret;
0032
0033 exynos_cpuidle_pdata->pre_enter_aftr();
0034
0035
0036
0037
0038 cpuidle_coupled_parallel_barrier(dev, &exynos_idle_barrier);
0039
0040
0041
0042
0043 ret = dev->cpu ? exynos_cpuidle_pdata->cpu1_powerdown()
0044 : exynos_cpuidle_pdata->cpu0_enter_aftr();
0045 if (ret)
0046 index = ret;
0047
0048
0049
0050
0051 cpuidle_coupled_parallel_barrier(dev, &exynos_idle_barrier);
0052
0053 exynos_cpuidle_pdata->post_enter_aftr();
0054
0055 return index;
0056 }
0057
0058 static int exynos_enter_lowpower(struct cpuidle_device *dev,
0059 struct cpuidle_driver *drv,
0060 int index)
0061 {
0062 int new_index = index;
0063
0064
0065 if (num_online_cpus() > 1 || dev->cpu != 0)
0066 new_index = drv->safe_state_index;
0067
0068 if (new_index == 0)
0069 return arm_cpuidle_simple_enter(dev, drv, new_index);
0070
0071 exynos_enter_aftr();
0072
0073 return new_index;
0074 }
0075
0076 static struct cpuidle_driver exynos_idle_driver = {
0077 .name = "exynos_idle",
0078 .owner = THIS_MODULE,
0079 .states = {
0080 [0] = ARM_CPUIDLE_WFI_STATE,
0081 [1] = {
0082 .enter = exynos_enter_lowpower,
0083 .exit_latency = 300,
0084 .target_residency = 10000,
0085 .name = "C1",
0086 .desc = "ARM power down",
0087 },
0088 },
0089 .state_count = 2,
0090 .safe_state_index = 0,
0091 };
0092
0093 static struct cpuidle_driver exynos_coupled_idle_driver = {
0094 .name = "exynos_coupled_idle",
0095 .owner = THIS_MODULE,
0096 .states = {
0097 [0] = ARM_CPUIDLE_WFI_STATE,
0098 [1] = {
0099 .enter = exynos_enter_coupled_lowpower,
0100 .exit_latency = 5000,
0101 .target_residency = 10000,
0102 .flags = CPUIDLE_FLAG_COUPLED |
0103 CPUIDLE_FLAG_TIMER_STOP,
0104 .name = "C1",
0105 .desc = "ARM power down",
0106 },
0107 },
0108 .state_count = 2,
0109 .safe_state_index = 0,
0110 };
0111
0112 static int exynos_cpuidle_probe(struct platform_device *pdev)
0113 {
0114 int ret;
0115
0116 if (IS_ENABLED(CONFIG_SMP) &&
0117 (of_machine_is_compatible("samsung,exynos4210") ||
0118 of_machine_is_compatible("samsung,exynos3250"))) {
0119 exynos_cpuidle_pdata = pdev->dev.platform_data;
0120
0121 ret = cpuidle_register(&exynos_coupled_idle_driver,
0122 cpu_possible_mask);
0123 } else {
0124 exynos_enter_aftr = (void *)(pdev->dev.platform_data);
0125
0126 ret = cpuidle_register(&exynos_idle_driver, NULL);
0127 }
0128
0129 if (ret) {
0130 dev_err(&pdev->dev, "failed to register cpuidle driver\n");
0131 return ret;
0132 }
0133
0134 return 0;
0135 }
0136
0137 static struct platform_driver exynos_cpuidle_driver = {
0138 .probe = exynos_cpuidle_probe,
0139 .driver = {
0140 .name = "exynos_cpuidle",
0141 },
0142 };
0143 builtin_platform_driver(exynos_cpuidle_driver);