drivers/cpufreq/sti-cpufreq.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Match running platform with pre-defined OPP values for CPUFreq
0004  *
0005  * Author: Ajit Pal Singh <ajitpal.singh@st.com>
0006  *         Lee Jones <lee.jones@linaro.org>
0007  *
0008  * Copyright (C) 2015 STMicroelectronics (R&D) Limited
0009  */
0010
0011 #include <linux/cpu.h>
0012 #include <linux/io.h>
0013 #include <linux/mfd/syscon.h>
0014 #include <linux/module.h>
0015 #include <linux/of.h>
0016 #include <linux/of_platform.h>
0017 #include <linux/pm_opp.h>
0018 #include <linux/regmap.h>
0019
0020 #define VERSION_ELEMENTS    3
0021 #define MAX_PCODE_NAME_LEN  7
0022
0023 #define VERSION_SHIFT       28
0024 #define HW_INFO_INDEX       1
0025 #define MAJOR_ID_INDEX      1
0026 #define MINOR_ID_INDEX      2
0027
0028 /*
0029  * Only match on "suitable for ALL versions" entries
0030  *
0031  * This will be used with the BIT() macro.  It sets the
0032  * top bit of a 32bit value and is equal to 0x80000000.
0033  */
0034 #define DEFAULT_VERSION     31
0035
0036 enum {
0037     PCODE = 0,
0038     SUBSTRATE,
0039     DVFS_MAX_REGFIELDS,
0040 };
0041
0042 /**
0043  * struct sti_cpufreq_ddata - ST CPUFreq Driver Data
0044  *
0045  * @cpu:        CPU's OF node
0046  * @syscfg_eng:     Engineering Syscon register map
0047  * @syscfg:     Syscon register map
0048  */
0049 static struct sti_cpufreq_ddata {
0050     struct device *cpu;
0051     struct regmap *syscfg_eng;
0052     struct regmap *syscfg;
0053 } ddata;
0054
0055 static int sti_cpufreq_fetch_major(void) {
0056     struct device_node *np = ddata.cpu->of_node;
0057     struct device *dev = ddata.cpu;
0058     unsigned int major_offset;
0059     unsigned int socid;
0060     int ret;
0061
0062     ret = of_property_read_u32_index(np, "st,syscfg",
0063                      MAJOR_ID_INDEX, &major_offset);
0064     if (ret) {
0065         dev_err(dev, "No major number offset provided in %pOF [%d]\n",
0066             np, ret);
0067         return ret;
0068     }
0069
0070     ret = regmap_read(ddata.syscfg, major_offset, &socid);
0071     if (ret) {
0072         dev_err(dev, "Failed to read major number from syscon [%d]\n",
0073             ret);
0074         return ret;
0075     }
0076
0077     return ((socid >> VERSION_SHIFT) & 0xf) + 1;
0078 }
0079
0080 static int sti_cpufreq_fetch_minor(void)
0081 {
0082     struct device *dev = ddata.cpu;
0083     struct device_node *np = dev->of_node;
0084     unsigned int minor_offset;
0085     unsigned int minid;
0086     int ret;
0087
0088     ret = of_property_read_u32_index(np, "st,syscfg-eng",
0089                      MINOR_ID_INDEX, &minor_offset);
0090     if (ret) {
0091         dev_err(dev,
0092             "No minor number offset provided %pOF [%d]\n",
0093             np, ret);
0094         return ret;
0095     }
0096
0097     ret = regmap_read(ddata.syscfg_eng, minor_offset, &minid);
0098     if (ret) {
0099         dev_err(dev,
0100             "Failed to read the minor number from syscon [%d]\n",
0101             ret);
0102         return ret;
0103     }
0104
0105     return minid & 0xf;
0106 }
0107
0108 static int sti_cpufreq_fetch_regmap_field(const struct reg_field *reg_fields,
0109                       int hw_info_offset, int field)
0110 {
0111     struct regmap_field *regmap_field;
0112     struct reg_field reg_field = reg_fields[field];
0113     struct device *dev = ddata.cpu;
0114     unsigned int value;
0115     int ret;
0116
0117     reg_field.reg = hw_info_offset;
0118     regmap_field = devm_regmap_field_alloc(dev,
0119                            ddata.syscfg_eng,
0120                            reg_field);
0121     if (IS_ERR(regmap_field)) {
0122         dev_err(dev, "Failed to allocate reg field\n");
0123         return PTR_ERR(regmap_field);
0124     }
0125
0126     ret = regmap_field_read(regmap_field, &value);
0127     if (ret) {
0128         dev_err(dev, "Failed to read %s code\n",
0129             field ? "SUBSTRATE" : "PCODE");
0130         return ret;
0131     }
0132
0133     return value;
0134 }
0135
0136 static const struct reg_field sti_stih407_dvfs_regfields[DVFS_MAX_REGFIELDS] = {
0137     [PCODE]     = REG_FIELD(0, 16, 19),
0138     [SUBSTRATE] = REG_FIELD(0, 0, 2),
0139 };
0140
0141 static const struct reg_field *sti_cpufreq_match(void)
0142 {
0143     if (of_machine_is_compatible("st,stih407") ||
0144         of_machine_is_compatible("st,stih410") ||
0145         of_machine_is_compatible("st,stih418"))
0146         return sti_stih407_dvfs_regfields;
0147
0148     return NULL;
0149 }
0150
0151 static int sti_cpufreq_set_opp_info(void)
0152 {
0153     struct device *dev = ddata.cpu;
0154     struct device_node *np = dev->of_node;
0155     const struct reg_field *reg_fields;
0156     unsigned int hw_info_offset;
0157     unsigned int version[VERSION_ELEMENTS];
0158     int pcode, substrate, major, minor;
0159     int opp_token, ret;
0160     char name[MAX_PCODE_NAME_LEN];
0161     struct dev_pm_opp_config config = {
0162         .supported_hw = version,
0163         .supported_hw_count = ARRAY_SIZE(version),
0164         .prop_name = name,
0165     };
0166
0167     reg_fields = sti_cpufreq_match();
0168     if (!reg_fields) {
0169         dev_err(dev, "This SoC doesn't support voltage scaling\n");
0170         return -ENODEV;
0171     }
0172
0173     ret = of_property_read_u32_index(np, "st,syscfg-eng",
0174                      HW_INFO_INDEX, &hw_info_offset);
0175     if (ret) {
0176         dev_warn(dev, "Failed to read HW info offset from DT\n");
0177         substrate = DEFAULT_VERSION;
0178         pcode = 0;
0179         goto use_defaults;
0180     }
0181
0182     pcode = sti_cpufreq_fetch_regmap_field(reg_fields,
0183                            hw_info_offset,
0184                            PCODE);
0185     if (pcode < 0) {
0186         dev_warn(dev, "Failed to obtain process code\n");
0187         /* Use default pcode */
0188         pcode = 0;
0189     }
0190
0191     substrate = sti_cpufreq_fetch_regmap_field(reg_fields,
0192                            hw_info_offset,
0193                            SUBSTRATE);
0194     if (substrate) {
0195         dev_warn(dev, "Failed to obtain substrate code\n");
0196         /* Use default substrate */
0197         substrate = DEFAULT_VERSION;
0198     }
0199
0200 use_defaults:
0201     major = sti_cpufreq_fetch_major();
0202     if (major < 0) {
0203         dev_err(dev, "Failed to obtain major version\n");
0204         /* Use default major number */
0205         major = DEFAULT_VERSION;
0206     }
0207
0208     minor = sti_cpufreq_fetch_minor();
0209     if (minor < 0) {
0210         dev_err(dev, "Failed to obtain minor version\n");
0211         /* Use default minor number */
0212         minor = DEFAULT_VERSION;
0213     }
0214
0215     snprintf(name, MAX_PCODE_NAME_LEN, "pcode%d", pcode);
0216
0217     version[0] = BIT(major);
0218     version[1] = BIT(minor);
0219     version[2] = BIT(substrate);
0220
0221     opp_token = dev_pm_opp_set_config(dev, &config);
0222     if (opp_token < 0) {
0223         dev_err(dev, "Failed to set OPP config\n");
0224         return opp_token;
0225     }
0226
0227     dev_dbg(dev, "pcode: %d major: %d minor: %d substrate: %d\n",
0228         pcode, major, minor, substrate);
0229     dev_dbg(dev, "version[0]: %x version[1]: %x version[2]: %x\n",
0230         version[0], version[1], version[2]);
0231
0232     return 0;
0233 }
0234
0235 static int sti_cpufreq_fetch_syscon_registers(void)
0236 {
0237     struct device *dev = ddata.cpu;
0238     struct device_node *np = dev->of_node;
0239
0240     ddata.syscfg = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
0241     if (IS_ERR(ddata.syscfg)) {
0242         dev_err(dev,  "\"st,syscfg\" not supplied\n");
0243         return PTR_ERR(ddata.syscfg);
0244     }
0245
0246     ddata.syscfg_eng = syscon_regmap_lookup_by_phandle(np, "st,syscfg-eng");
0247     if (IS_ERR(ddata.syscfg_eng)) {
0248         dev_err(dev, "\"st,syscfg-eng\" not supplied\n");
0249         return PTR_ERR(ddata.syscfg_eng);
0250     }
0251
0252     return 0;
0253 }
0254
0255 static int sti_cpufreq_init(void)
0256 {
0257     int ret;
0258
0259     if ((!of_machine_is_compatible("st,stih407")) &&
0260         (!of_machine_is_compatible("st,stih410")) &&
0261         (!of_machine_is_compatible("st,stih418")))
0262         return -ENODEV;
0263
0264     ddata.cpu = get_cpu_device(0);
0265     if (!ddata.cpu) {
0266         dev_err(ddata.cpu, "Failed to get device for CPU0\n");
0267         goto skip_voltage_scaling;
0268     }
0269
0270     if (!of_get_property(ddata.cpu->of_node, "operating-points-v2", NULL)) {
0271         dev_err(ddata.cpu, "OPP-v2 not supported\n");
0272         goto skip_voltage_scaling;
0273     }
0274
0275     ret = sti_cpufreq_fetch_syscon_registers();
0276     if (ret)
0277         goto skip_voltage_scaling;
0278
0279     ret = sti_cpufreq_set_opp_info();
0280     if (!ret)
0281         goto register_cpufreq_dt;
0282
0283 skip_voltage_scaling:
0284     dev_err(ddata.cpu, "Not doing voltage scaling\n");
0285
0286 register_cpufreq_dt:
0287     platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
0288
0289     return 0;
0290 }
0291 module_init(sti_cpufreq_init);
0292
0293 static const struct of_device_id __maybe_unused sti_cpufreq_of_match[] = {
0294     { .compatible = "st,stih407" },
0295     { .compatible = "st,stih410" },
0296     { },
0297 };
0298 MODULE_DEVICE_TABLE(of, sti_cpufreq_of_match);
0299
0300 MODULE_DESCRIPTION("STMicroelectronics CPUFreq/OPP driver");
0301 MODULE_AUTHOR("Ajitpal Singh <ajitpal.singh@st.com>");
0302 MODULE_AUTHOR("Lee Jones <lee.jones@linaro.org>");
0303 MODULE_LICENSE("GPL v2");