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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *   (c) 2003-2012 Advanced Micro Devices, Inc.
0004  *
0005  *  Maintainer:
0006  *  Andreas Herrmann <herrmann.der.user@googlemail.com>
0007  *
0008  *  Based on the powernow-k7.c module written by Dave Jones.
0009  *  (C) 2003 Dave Jones on behalf of SuSE Labs
0010  *  (C) 2004 Dominik Brodowski <linux@brodo.de>
0011  *  (C) 2004 Pavel Machek <pavel@ucw.cz>
0012  *  Based upon datasheets & sample CPUs kindly provided by AMD.
0013  *
0014  *  Valuable input gratefully received from Dave Jones, Pavel Machek,
0015  *  Dominik Brodowski, Jacob Shin, and others.
0016  *  Originally developed by Paul Devriendt.
0017  *
0018  *  Processor information obtained from Chapter 9 (Power and Thermal
0019  *  Management) of the "BIOS and Kernel Developer's Guide (BKDG) for
0020  *  the AMD Athlon 64 and AMD Opteron Processors" and section "2.x
0021  *  Power Management" in BKDGs for newer AMD CPU families.
0022  *
0023  *  Tables for specific CPUs can be inferred from AMD's processor
0024  *  power and thermal data sheets, (e.g. 30417.pdf, 30430.pdf, 43375.pdf)
0025  */
0026 
0027 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0028 
0029 #include <linux/kernel.h>
0030 #include <linux/smp.h>
0031 #include <linux/module.h>
0032 #include <linux/init.h>
0033 #include <linux/cpufreq.h>
0034 #include <linux/slab.h>
0035 #include <linux/string.h>
0036 #include <linux/cpumask.h>
0037 #include <linux/io.h>
0038 #include <linux/delay.h>
0039 
0040 #include <asm/msr.h>
0041 #include <asm/cpu_device_id.h>
0042 
0043 #include <linux/acpi.h>
0044 #include <linux/mutex.h>
0045 #include <acpi/processor.h>
0046 
0047 #define VERSION "version 2.20.00"
0048 #include "powernow-k8.h"
0049 
0050 /* serialize freq changes  */
0051 static DEFINE_MUTEX(fidvid_mutex);
0052 
0053 static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
0054 
0055 static struct cpufreq_driver cpufreq_amd64_driver;
0056 
0057 /* Return a frequency in MHz, given an input fid */
0058 static u32 find_freq_from_fid(u32 fid)
0059 {
0060     return 800 + (fid * 100);
0061 }
0062 
0063 /* Return a frequency in KHz, given an input fid */
0064 static u32 find_khz_freq_from_fid(u32 fid)
0065 {
0066     return 1000 * find_freq_from_fid(fid);
0067 }
0068 
0069 /* Return the vco fid for an input fid
0070  *
0071  * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
0072  * only from corresponding high fids. This returns "high" fid corresponding to
0073  * "low" one.
0074  */
0075 static u32 convert_fid_to_vco_fid(u32 fid)
0076 {
0077     if (fid < HI_FID_TABLE_BOTTOM)
0078         return 8 + (2 * fid);
0079     else
0080         return fid;
0081 }
0082 
0083 /*
0084  * Return 1 if the pending bit is set. Unless we just instructed the processor
0085  * to transition to a new state, seeing this bit set is really bad news.
0086  */
0087 static int pending_bit_stuck(void)
0088 {
0089     u32 lo, hi __always_unused;
0090 
0091     rdmsr(MSR_FIDVID_STATUS, lo, hi);
0092     return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
0093 }
0094 
0095 /*
0096  * Update the global current fid / vid values from the status msr.
0097  * Returns 1 on error.
0098  */
0099 static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
0100 {
0101     u32 lo, hi;
0102     u32 i = 0;
0103 
0104     do {
0105         if (i++ > 10000) {
0106             pr_debug("detected change pending stuck\n");
0107             return 1;
0108         }
0109         rdmsr(MSR_FIDVID_STATUS, lo, hi);
0110     } while (lo & MSR_S_LO_CHANGE_PENDING);
0111 
0112     data->currvid = hi & MSR_S_HI_CURRENT_VID;
0113     data->currfid = lo & MSR_S_LO_CURRENT_FID;
0114 
0115     return 0;
0116 }
0117 
0118 /* the isochronous relief time */
0119 static void count_off_irt(struct powernow_k8_data *data)
0120 {
0121     udelay((1 << data->irt) * 10);
0122 }
0123 
0124 /* the voltage stabilization time */
0125 static void count_off_vst(struct powernow_k8_data *data)
0126 {
0127     udelay(data->vstable * VST_UNITS_20US);
0128 }
0129 
0130 /* need to init the control msr to a safe value (for each cpu) */
0131 static void fidvid_msr_init(void)
0132 {
0133     u32 lo, hi;
0134     u8 fid, vid;
0135 
0136     rdmsr(MSR_FIDVID_STATUS, lo, hi);
0137     vid = hi & MSR_S_HI_CURRENT_VID;
0138     fid = lo & MSR_S_LO_CURRENT_FID;
0139     lo = fid | (vid << MSR_C_LO_VID_SHIFT);
0140     hi = MSR_C_HI_STP_GNT_BENIGN;
0141     pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
0142     wrmsr(MSR_FIDVID_CTL, lo, hi);
0143 }
0144 
0145 /* write the new fid value along with the other control fields to the msr */
0146 static int write_new_fid(struct powernow_k8_data *data, u32 fid)
0147 {
0148     u32 lo;
0149     u32 savevid = data->currvid;
0150     u32 i = 0;
0151 
0152     if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
0153         pr_err("internal error - overflow on fid write\n");
0154         return 1;
0155     }
0156 
0157     lo = fid;
0158     lo |= (data->currvid << MSR_C_LO_VID_SHIFT);
0159     lo |= MSR_C_LO_INIT_FID_VID;
0160 
0161     pr_debug("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
0162         fid, lo, data->plllock * PLL_LOCK_CONVERSION);
0163 
0164     do {
0165         wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
0166         if (i++ > 100) {
0167             pr_err("Hardware error - pending bit very stuck - no further pstate changes possible\n");
0168             return 1;
0169         }
0170     } while (query_current_values_with_pending_wait(data));
0171 
0172     count_off_irt(data);
0173 
0174     if (savevid != data->currvid) {
0175         pr_err("vid change on fid trans, old 0x%x, new 0x%x\n",
0176                savevid, data->currvid);
0177         return 1;
0178     }
0179 
0180     if (fid != data->currfid) {
0181         pr_err("fid trans failed, fid 0x%x, curr 0x%x\n", fid,
0182             data->currfid);
0183         return 1;
0184     }
0185 
0186     return 0;
0187 }
0188 
0189 /* Write a new vid to the hardware */
0190 static int write_new_vid(struct powernow_k8_data *data, u32 vid)
0191 {
0192     u32 lo;
0193     u32 savefid = data->currfid;
0194     int i = 0;
0195 
0196     if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
0197         pr_err("internal error - overflow on vid write\n");
0198         return 1;
0199     }
0200 
0201     lo = data->currfid;
0202     lo |= (vid << MSR_C_LO_VID_SHIFT);
0203     lo |= MSR_C_LO_INIT_FID_VID;
0204 
0205     pr_debug("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
0206         vid, lo, STOP_GRANT_5NS);
0207 
0208     do {
0209         wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
0210         if (i++ > 100) {
0211             pr_err("internal error - pending bit very stuck - no further pstate changes possible\n");
0212             return 1;
0213         }
0214     } while (query_current_values_with_pending_wait(data));
0215 
0216     if (savefid != data->currfid) {
0217         pr_err("fid changed on vid trans, old 0x%x new 0x%x\n",
0218             savefid, data->currfid);
0219         return 1;
0220     }
0221 
0222     if (vid != data->currvid) {
0223         pr_err("vid trans failed, vid 0x%x, curr 0x%x\n",
0224                 vid, data->currvid);
0225         return 1;
0226     }
0227 
0228     return 0;
0229 }
0230 
0231 /*
0232  * Reduce the vid by the max of step or reqvid.
0233  * Decreasing vid codes represent increasing voltages:
0234  * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
0235  */
0236 static int decrease_vid_code_by_step(struct powernow_k8_data *data,
0237         u32 reqvid, u32 step)
0238 {
0239     if ((data->currvid - reqvid) > step)
0240         reqvid = data->currvid - step;
0241 
0242     if (write_new_vid(data, reqvid))
0243         return 1;
0244 
0245     count_off_vst(data);
0246 
0247     return 0;
0248 }
0249 
0250 /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
0251 static int transition_fid_vid(struct powernow_k8_data *data,
0252         u32 reqfid, u32 reqvid)
0253 {
0254     if (core_voltage_pre_transition(data, reqvid, reqfid))
0255         return 1;
0256 
0257     if (core_frequency_transition(data, reqfid))
0258         return 1;
0259 
0260     if (core_voltage_post_transition(data, reqvid))
0261         return 1;
0262 
0263     if (query_current_values_with_pending_wait(data))
0264         return 1;
0265 
0266     if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
0267         pr_err("failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n",
0268                 smp_processor_id(),
0269                 reqfid, reqvid, data->currfid, data->currvid);
0270         return 1;
0271     }
0272 
0273     pr_debug("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
0274         smp_processor_id(), data->currfid, data->currvid);
0275 
0276     return 0;
0277 }
0278 
0279 /* Phase 1 - core voltage transition ... setup voltage */
0280 static int core_voltage_pre_transition(struct powernow_k8_data *data,
0281         u32 reqvid, u32 reqfid)
0282 {
0283     u32 rvosteps = data->rvo;
0284     u32 savefid = data->currfid;
0285     u32 maxvid, lo __always_unused, rvomult = 1;
0286 
0287     pr_debug("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n",
0288         smp_processor_id(),
0289         data->currfid, data->currvid, reqvid, data->rvo);
0290 
0291     if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP))
0292         rvomult = 2;
0293     rvosteps *= rvomult;
0294     rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
0295     maxvid = 0x1f & (maxvid >> 16);
0296     pr_debug("ph1 maxvid=0x%x\n", maxvid);
0297     if (reqvid < maxvid) /* lower numbers are higher voltages */
0298         reqvid = maxvid;
0299 
0300     while (data->currvid > reqvid) {
0301         pr_debug("ph1: curr 0x%x, req vid 0x%x\n",
0302             data->currvid, reqvid);
0303         if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
0304             return 1;
0305     }
0306 
0307     while ((rvosteps > 0) &&
0308             ((rvomult * data->rvo + data->currvid) > reqvid)) {
0309         if (data->currvid == maxvid) {
0310             rvosteps = 0;
0311         } else {
0312             pr_debug("ph1: changing vid for rvo, req 0x%x\n",
0313                 data->currvid - 1);
0314             if (decrease_vid_code_by_step(data, data->currvid-1, 1))
0315                 return 1;
0316             rvosteps--;
0317         }
0318     }
0319 
0320     if (query_current_values_with_pending_wait(data))
0321         return 1;
0322 
0323     if (savefid != data->currfid) {
0324         pr_err("ph1 err, currfid changed 0x%x\n", data->currfid);
0325         return 1;
0326     }
0327 
0328     pr_debug("ph1 complete, currfid 0x%x, currvid 0x%x\n",
0329         data->currfid, data->currvid);
0330 
0331     return 0;
0332 }
0333 
0334 /* Phase 2 - core frequency transition */
0335 static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
0336 {
0337     u32 vcoreqfid, vcocurrfid, vcofiddiff;
0338     u32 fid_interval, savevid = data->currvid;
0339 
0340     if (data->currfid == reqfid) {
0341         pr_err("ph2 null fid transition 0x%x\n", data->currfid);
0342         return 0;
0343     }
0344 
0345     pr_debug("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n",
0346         smp_processor_id(),
0347         data->currfid, data->currvid, reqfid);
0348 
0349     vcoreqfid = convert_fid_to_vco_fid(reqfid);
0350     vcocurrfid = convert_fid_to_vco_fid(data->currfid);
0351     vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
0352         : vcoreqfid - vcocurrfid;
0353 
0354     if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP))
0355         vcofiddiff = 0;
0356 
0357     while (vcofiddiff > 2) {
0358         (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
0359 
0360         if (reqfid > data->currfid) {
0361             if (data->currfid > LO_FID_TABLE_TOP) {
0362                 if (write_new_fid(data,
0363                         data->currfid + fid_interval))
0364                     return 1;
0365             } else {
0366                 if (write_new_fid
0367                     (data,
0368                      2 + convert_fid_to_vco_fid(data->currfid)))
0369                     return 1;
0370             }
0371         } else {
0372             if (write_new_fid(data, data->currfid - fid_interval))
0373                 return 1;
0374         }
0375 
0376         vcocurrfid = convert_fid_to_vco_fid(data->currfid);
0377         vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
0378             : vcoreqfid - vcocurrfid;
0379     }
0380 
0381     if (write_new_fid(data, reqfid))
0382         return 1;
0383 
0384     if (query_current_values_with_pending_wait(data))
0385         return 1;
0386 
0387     if (data->currfid != reqfid) {
0388         pr_err("ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n",
0389             data->currfid, reqfid);
0390         return 1;
0391     }
0392 
0393     if (savevid != data->currvid) {
0394         pr_err("ph2: vid changed, save 0x%x, curr 0x%x\n",
0395             savevid, data->currvid);
0396         return 1;
0397     }
0398 
0399     pr_debug("ph2 complete, currfid 0x%x, currvid 0x%x\n",
0400         data->currfid, data->currvid);
0401 
0402     return 0;
0403 }
0404 
0405 /* Phase 3 - core voltage transition flow ... jump to the final vid. */
0406 static int core_voltage_post_transition(struct powernow_k8_data *data,
0407         u32 reqvid)
0408 {
0409     u32 savefid = data->currfid;
0410     u32 savereqvid = reqvid;
0411 
0412     pr_debug("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
0413         smp_processor_id(),
0414         data->currfid, data->currvid);
0415 
0416     if (reqvid != data->currvid) {
0417         if (write_new_vid(data, reqvid))
0418             return 1;
0419 
0420         if (savefid != data->currfid) {
0421             pr_err("ph3: bad fid change, save 0x%x, curr 0x%x\n",
0422                 savefid, data->currfid);
0423             return 1;
0424         }
0425 
0426         if (data->currvid != reqvid) {
0427             pr_err("ph3: failed vid transition\n, req 0x%x, curr 0x%x",
0428                 reqvid, data->currvid);
0429             return 1;
0430         }
0431     }
0432 
0433     if (query_current_values_with_pending_wait(data))
0434         return 1;
0435 
0436     if (savereqvid != data->currvid) {
0437         pr_debug("ph3 failed, currvid 0x%x\n", data->currvid);
0438         return 1;
0439     }
0440 
0441     if (savefid != data->currfid) {
0442         pr_debug("ph3 failed, currfid changed 0x%x\n",
0443             data->currfid);
0444         return 1;
0445     }
0446 
0447     pr_debug("ph3 complete, currfid 0x%x, currvid 0x%x\n",
0448         data->currfid, data->currvid);
0449 
0450     return 0;
0451 }
0452 
0453 static const struct x86_cpu_id powernow_k8_ids[] = {
0454     /* IO based frequency switching */
0455     X86_MATCH_VENDOR_FAM(AMD, 0xf, NULL),
0456     {}
0457 };
0458 MODULE_DEVICE_TABLE(x86cpu, powernow_k8_ids);
0459 
0460 static void check_supported_cpu(void *_rc)
0461 {
0462     u32 eax, ebx, ecx, edx;
0463     int *rc = _rc;
0464 
0465     *rc = -ENODEV;
0466 
0467     eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
0468 
0469     if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
0470         if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
0471             ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
0472             pr_info("Processor cpuid %x not supported\n", eax);
0473             return;
0474         }
0475 
0476         eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
0477         if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
0478             pr_info("No frequency change capabilities detected\n");
0479             return;
0480         }
0481 
0482         cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
0483         if ((edx & P_STATE_TRANSITION_CAPABLE)
0484             != P_STATE_TRANSITION_CAPABLE) {
0485             pr_info("Power state transitions not supported\n");
0486             return;
0487         }
0488         *rc = 0;
0489     }
0490 }
0491 
0492 static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
0493         u8 maxvid)
0494 {
0495     unsigned int j;
0496     u8 lastfid = 0xff;
0497 
0498     for (j = 0; j < data->numps; j++) {
0499         if (pst[j].vid > LEAST_VID) {
0500             pr_err(FW_BUG "vid %d invalid : 0x%x\n", j,
0501                 pst[j].vid);
0502             return -EINVAL;
0503         }
0504         if (pst[j].vid < data->rvo) {
0505             /* vid + rvo >= 0 */
0506             pr_err(FW_BUG "0 vid exceeded with pstate %d\n", j);
0507             return -ENODEV;
0508         }
0509         if (pst[j].vid < maxvid + data->rvo) {
0510             /* vid + rvo >= maxvid */
0511             pr_err(FW_BUG "maxvid exceeded with pstate %d\n", j);
0512             return -ENODEV;
0513         }
0514         if (pst[j].fid > MAX_FID) {
0515             pr_err(FW_BUG "maxfid exceeded with pstate %d\n", j);
0516             return -ENODEV;
0517         }
0518         if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
0519             /* Only first fid is allowed to be in "low" range */
0520             pr_err(FW_BUG "two low fids - %d : 0x%x\n", j,
0521                 pst[j].fid);
0522             return -EINVAL;
0523         }
0524         if (pst[j].fid < lastfid)
0525             lastfid = pst[j].fid;
0526     }
0527     if (lastfid & 1) {
0528         pr_err(FW_BUG "lastfid invalid\n");
0529         return -EINVAL;
0530     }
0531     if (lastfid > LO_FID_TABLE_TOP)
0532         pr_info(FW_BUG "first fid not from lo freq table\n");
0533 
0534     return 0;
0535 }
0536 
0537 static void invalidate_entry(struct cpufreq_frequency_table *powernow_table,
0538         unsigned int entry)
0539 {
0540     powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
0541 }
0542 
0543 static void print_basics(struct powernow_k8_data *data)
0544 {
0545     int j;
0546     for (j = 0; j < data->numps; j++) {
0547         if (data->powernow_table[j].frequency !=
0548                 CPUFREQ_ENTRY_INVALID) {
0549             pr_info("fid 0x%x (%d MHz), vid 0x%x\n",
0550                 data->powernow_table[j].driver_data & 0xff,
0551                 data->powernow_table[j].frequency/1000,
0552                 data->powernow_table[j].driver_data >> 8);
0553         }
0554     }
0555     if (data->batps)
0556         pr_info("Only %d pstates on battery\n", data->batps);
0557 }
0558 
0559 static int fill_powernow_table(struct powernow_k8_data *data,
0560         struct pst_s *pst, u8 maxvid)
0561 {
0562     struct cpufreq_frequency_table *powernow_table;
0563     unsigned int j;
0564 
0565     if (data->batps) {
0566         /* use ACPI support to get full speed on mains power */
0567         pr_warn("Only %d pstates usable (use ACPI driver for full range\n",
0568             data->batps);
0569         data->numps = data->batps;
0570     }
0571 
0572     for (j = 1; j < data->numps; j++) {
0573         if (pst[j-1].fid >= pst[j].fid) {
0574             pr_err("PST out of sequence\n");
0575             return -EINVAL;
0576         }
0577     }
0578 
0579     if (data->numps < 2) {
0580         pr_err("no p states to transition\n");
0581         return -ENODEV;
0582     }
0583 
0584     if (check_pst_table(data, pst, maxvid))
0585         return -EINVAL;
0586 
0587     powernow_table = kzalloc((sizeof(*powernow_table)
0588         * (data->numps + 1)), GFP_KERNEL);
0589     if (!powernow_table)
0590         return -ENOMEM;
0591 
0592     for (j = 0; j < data->numps; j++) {
0593         int freq;
0594         powernow_table[j].driver_data = pst[j].fid; /* lower 8 bits */
0595         powernow_table[j].driver_data |= (pst[j].vid << 8); /* upper 8 bits */
0596         freq = find_khz_freq_from_fid(pst[j].fid);
0597         powernow_table[j].frequency = freq;
0598     }
0599     powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
0600     powernow_table[data->numps].driver_data = 0;
0601 
0602     if (query_current_values_with_pending_wait(data)) {
0603         kfree(powernow_table);
0604         return -EIO;
0605     }
0606 
0607     pr_debug("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
0608     data->powernow_table = powernow_table;
0609     if (cpumask_first(topology_core_cpumask(data->cpu)) == data->cpu)
0610         print_basics(data);
0611 
0612     for (j = 0; j < data->numps; j++)
0613         if ((pst[j].fid == data->currfid) &&
0614             (pst[j].vid == data->currvid))
0615             return 0;
0616 
0617     pr_debug("currfid/vid do not match PST, ignoring\n");
0618     return 0;
0619 }
0620 
0621 /* Find and validate the PSB/PST table in BIOS. */
0622 static int find_psb_table(struct powernow_k8_data *data)
0623 {
0624     struct psb_s *psb;
0625     unsigned int i;
0626     u32 mvs;
0627     u8 maxvid;
0628     u32 cpst = 0;
0629     u32 thiscpuid;
0630 
0631     for (i = 0xc0000; i < 0xffff0; i += 0x10) {
0632         /* Scan BIOS looking for the signature. */
0633         /* It can not be at ffff0 - it is too big. */
0634 
0635         psb = phys_to_virt(i);
0636         if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
0637             continue;
0638 
0639         pr_debug("found PSB header at 0x%p\n", psb);
0640 
0641         pr_debug("table vers: 0x%x\n", psb->tableversion);
0642         if (psb->tableversion != PSB_VERSION_1_4) {
0643             pr_err(FW_BUG "PSB table is not v1.4\n");
0644             return -ENODEV;
0645         }
0646 
0647         pr_debug("flags: 0x%x\n", psb->flags1);
0648         if (psb->flags1) {
0649             pr_err(FW_BUG "unknown flags\n");
0650             return -ENODEV;
0651         }
0652 
0653         data->vstable = psb->vstable;
0654         pr_debug("voltage stabilization time: %d(*20us)\n",
0655                 data->vstable);
0656 
0657         pr_debug("flags2: 0x%x\n", psb->flags2);
0658         data->rvo = psb->flags2 & 3;
0659         data->irt = ((psb->flags2) >> 2) & 3;
0660         mvs = ((psb->flags2) >> 4) & 3;
0661         data->vidmvs = 1 << mvs;
0662         data->batps = ((psb->flags2) >> 6) & 3;
0663 
0664         pr_debug("ramp voltage offset: %d\n", data->rvo);
0665         pr_debug("isochronous relief time: %d\n", data->irt);
0666         pr_debug("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
0667 
0668         pr_debug("numpst: 0x%x\n", psb->num_tables);
0669         cpst = psb->num_tables;
0670         if ((psb->cpuid == 0x00000fc0) ||
0671             (psb->cpuid == 0x00000fe0)) {
0672             thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
0673             if ((thiscpuid == 0x00000fc0) ||
0674                 (thiscpuid == 0x00000fe0))
0675                 cpst = 1;
0676         }
0677         if (cpst != 1) {
0678             pr_err(FW_BUG "numpst must be 1\n");
0679             return -ENODEV;
0680         }
0681 
0682         data->plllock = psb->plllocktime;
0683         pr_debug("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
0684         pr_debug("maxfid: 0x%x\n", psb->maxfid);
0685         pr_debug("maxvid: 0x%x\n", psb->maxvid);
0686         maxvid = psb->maxvid;
0687 
0688         data->numps = psb->numps;
0689         pr_debug("numpstates: 0x%x\n", data->numps);
0690         return fill_powernow_table(data,
0691                 (struct pst_s *)(psb+1), maxvid);
0692     }
0693     /*
0694      * If you see this message, complain to BIOS manufacturer. If
0695      * he tells you "we do not support Linux" or some similar
0696      * nonsense, remember that Windows 2000 uses the same legacy
0697      * mechanism that the old Linux PSB driver uses. Tell them it
0698      * is broken with Windows 2000.
0699      *
0700      * The reference to the AMD documentation is chapter 9 in the
0701      * BIOS and Kernel Developer's Guide, which is available on
0702      * www.amd.com
0703      */
0704     pr_err(FW_BUG "No PSB or ACPI _PSS objects\n");
0705     pr_err("Make sure that your BIOS is up to date and Cool'N'Quiet support is enabled in BIOS setup\n");
0706     return -ENODEV;
0707 }
0708 
0709 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data,
0710         unsigned int index)
0711 {
0712     u64 control;
0713 
0714     if (!data->acpi_data.state_count)
0715         return;
0716 
0717     control = data->acpi_data.states[index].control;
0718     data->irt = (control >> IRT_SHIFT) & IRT_MASK;
0719     data->rvo = (control >> RVO_SHIFT) & RVO_MASK;
0720     data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
0721     data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK;
0722     data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK);
0723     data->vstable = (control >> VST_SHIFT) & VST_MASK;
0724 }
0725 
0726 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
0727 {
0728     struct cpufreq_frequency_table *powernow_table;
0729     int ret_val = -ENODEV;
0730     u64 control, status;
0731 
0732     if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
0733         pr_debug("register performance failed: bad ACPI data\n");
0734         return -EIO;
0735     }
0736 
0737     /* verify the data contained in the ACPI structures */
0738     if (data->acpi_data.state_count <= 1) {
0739         pr_debug("No ACPI P-States\n");
0740         goto err_out;
0741     }
0742 
0743     control = data->acpi_data.control_register.space_id;
0744     status = data->acpi_data.status_register.space_id;
0745 
0746     if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
0747         (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
0748         pr_debug("Invalid control/status registers (%llx - %llx)\n",
0749             control, status);
0750         goto err_out;
0751     }
0752 
0753     /* fill in data->powernow_table */
0754     powernow_table = kzalloc((sizeof(*powernow_table)
0755         * (data->acpi_data.state_count + 1)), GFP_KERNEL);
0756     if (!powernow_table)
0757         goto err_out;
0758 
0759     /* fill in data */
0760     data->numps = data->acpi_data.state_count;
0761     powernow_k8_acpi_pst_values(data, 0);
0762 
0763     ret_val = fill_powernow_table_fidvid(data, powernow_table);
0764     if (ret_val)
0765         goto err_out_mem;
0766 
0767     powernow_table[data->acpi_data.state_count].frequency =
0768         CPUFREQ_TABLE_END;
0769     data->powernow_table = powernow_table;
0770 
0771     if (cpumask_first(topology_core_cpumask(data->cpu)) == data->cpu)
0772         print_basics(data);
0773 
0774     /* notify BIOS that we exist */
0775     acpi_processor_notify_smm(THIS_MODULE);
0776 
0777     if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) {
0778         pr_err("unable to alloc powernow_k8_data cpumask\n");
0779         ret_val = -ENOMEM;
0780         goto err_out_mem;
0781     }
0782 
0783     return 0;
0784 
0785 err_out_mem:
0786     kfree(powernow_table);
0787 
0788 err_out:
0789     acpi_processor_unregister_performance(data->cpu);
0790 
0791     /* data->acpi_data.state_count informs us at ->exit()
0792      * whether ACPI was used */
0793     data->acpi_data.state_count = 0;
0794 
0795     return ret_val;
0796 }
0797 
0798 static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
0799         struct cpufreq_frequency_table *powernow_table)
0800 {
0801     int i;
0802 
0803     for (i = 0; i < data->acpi_data.state_count; i++) {
0804         u32 fid;
0805         u32 vid;
0806         u32 freq, index;
0807         u64 status, control;
0808 
0809         if (data->exttype) {
0810             status =  data->acpi_data.states[i].status;
0811             fid = status & EXT_FID_MASK;
0812             vid = (status >> VID_SHIFT) & EXT_VID_MASK;
0813         } else {
0814             control =  data->acpi_data.states[i].control;
0815             fid = control & FID_MASK;
0816             vid = (control >> VID_SHIFT) & VID_MASK;
0817         }
0818 
0819         pr_debug("   %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
0820 
0821         index = fid | (vid<<8);
0822         powernow_table[i].driver_data = index;
0823 
0824         freq = find_khz_freq_from_fid(fid);
0825         powernow_table[i].frequency = freq;
0826 
0827         /* verify frequency is OK */
0828         if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
0829             pr_debug("invalid freq %u kHz, ignoring\n", freq);
0830             invalidate_entry(powernow_table, i);
0831             continue;
0832         }
0833 
0834         /* verify voltage is OK -
0835          * BIOSs are using "off" to indicate invalid */
0836         if (vid == VID_OFF) {
0837             pr_debug("invalid vid %u, ignoring\n", vid);
0838             invalidate_entry(powernow_table, i);
0839             continue;
0840         }
0841 
0842         if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
0843             pr_info("invalid freq entries %u kHz vs. %u kHz\n",
0844                 freq, (unsigned int)
0845                 (data->acpi_data.states[i].core_frequency
0846                  * 1000));
0847             invalidate_entry(powernow_table, i);
0848             continue;
0849         }
0850     }
0851     return 0;
0852 }
0853 
0854 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
0855 {
0856     if (data->acpi_data.state_count)
0857         acpi_processor_unregister_performance(data->cpu);
0858     free_cpumask_var(data->acpi_data.shared_cpu_map);
0859 }
0860 
0861 static int get_transition_latency(struct powernow_k8_data *data)
0862 {
0863     int max_latency = 0;
0864     int i;
0865     for (i = 0; i < data->acpi_data.state_count; i++) {
0866         int cur_latency = data->acpi_data.states[i].transition_latency
0867             + data->acpi_data.states[i].bus_master_latency;
0868         if (cur_latency > max_latency)
0869             max_latency = cur_latency;
0870     }
0871     if (max_latency == 0) {
0872         pr_err(FW_WARN "Invalid zero transition latency\n");
0873         max_latency = 1;
0874     }
0875     /* value in usecs, needs to be in nanoseconds */
0876     return 1000 * max_latency;
0877 }
0878 
0879 /* Take a frequency, and issue the fid/vid transition command */
0880 static int transition_frequency_fidvid(struct powernow_k8_data *data,
0881         unsigned int index,
0882         struct cpufreq_policy *policy)
0883 {
0884     u32 fid = 0;
0885     u32 vid = 0;
0886     int res;
0887     struct cpufreq_freqs freqs;
0888 
0889     pr_debug("cpu %d transition to index %u\n", smp_processor_id(), index);
0890 
0891     /* fid/vid correctness check for k8 */
0892     /* fid are the lower 8 bits of the index we stored into
0893      * the cpufreq frequency table in find_psb_table, vid
0894      * are the upper 8 bits.
0895      */
0896     fid = data->powernow_table[index].driver_data & 0xFF;
0897     vid = (data->powernow_table[index].driver_data & 0xFF00) >> 8;
0898 
0899     pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
0900 
0901     if (query_current_values_with_pending_wait(data))
0902         return 1;
0903 
0904     if ((data->currvid == vid) && (data->currfid == fid)) {
0905         pr_debug("target matches current values (fid 0x%x, vid 0x%x)\n",
0906             fid, vid);
0907         return 0;
0908     }
0909 
0910     pr_debug("cpu %d, changing to fid 0x%x, vid 0x%x\n",
0911         smp_processor_id(), fid, vid);
0912     freqs.old = find_khz_freq_from_fid(data->currfid);
0913     freqs.new = find_khz_freq_from_fid(fid);
0914 
0915     cpufreq_freq_transition_begin(policy, &freqs);
0916     res = transition_fid_vid(data, fid, vid);
0917     cpufreq_freq_transition_end(policy, &freqs, res);
0918 
0919     return res;
0920 }
0921 
0922 struct powernowk8_target_arg {
0923     struct cpufreq_policy       *pol;
0924     unsigned            newstate;
0925 };
0926 
0927 static long powernowk8_target_fn(void *arg)
0928 {
0929     struct powernowk8_target_arg *pta = arg;
0930     struct cpufreq_policy *pol = pta->pol;
0931     unsigned newstate = pta->newstate;
0932     struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
0933     u32 checkfid;
0934     u32 checkvid;
0935     int ret;
0936 
0937     if (!data)
0938         return -EINVAL;
0939 
0940     checkfid = data->currfid;
0941     checkvid = data->currvid;
0942 
0943     if (pending_bit_stuck()) {
0944         pr_err("failing targ, change pending bit set\n");
0945         return -EIO;
0946     }
0947 
0948     pr_debug("targ: cpu %d, %d kHz, min %d, max %d\n",
0949         pol->cpu, data->powernow_table[newstate].frequency, pol->min,
0950         pol->max);
0951 
0952     if (query_current_values_with_pending_wait(data))
0953         return -EIO;
0954 
0955     pr_debug("targ: curr fid 0x%x, vid 0x%x\n",
0956         data->currfid, data->currvid);
0957 
0958     if ((checkvid != data->currvid) ||
0959         (checkfid != data->currfid)) {
0960         pr_info("error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
0961                checkfid, data->currfid,
0962                checkvid, data->currvid);
0963     }
0964 
0965     mutex_lock(&fidvid_mutex);
0966 
0967     powernow_k8_acpi_pst_values(data, newstate);
0968 
0969     ret = transition_frequency_fidvid(data, newstate, pol);
0970 
0971     if (ret) {
0972         pr_err("transition frequency failed\n");
0973         mutex_unlock(&fidvid_mutex);
0974         return 1;
0975     }
0976     mutex_unlock(&fidvid_mutex);
0977 
0978     pol->cur = find_khz_freq_from_fid(data->currfid);
0979 
0980     return 0;
0981 }
0982 
0983 /* Driver entry point to switch to the target frequency */
0984 static int powernowk8_target(struct cpufreq_policy *pol, unsigned index)
0985 {
0986     struct powernowk8_target_arg pta = { .pol = pol, .newstate = index };
0987 
0988     return work_on_cpu(pol->cpu, powernowk8_target_fn, &pta);
0989 }
0990 
0991 struct init_on_cpu {
0992     struct powernow_k8_data *data;
0993     int rc;
0994 };
0995 
0996 static void powernowk8_cpu_init_on_cpu(void *_init_on_cpu)
0997 {
0998     struct init_on_cpu *init_on_cpu = _init_on_cpu;
0999 
1000     if (pending_bit_stuck()) {
1001         pr_err("failing init, change pending bit set\n");
1002         init_on_cpu->rc = -ENODEV;
1003         return;
1004     }
1005 
1006     if (query_current_values_with_pending_wait(init_on_cpu->data)) {
1007         init_on_cpu->rc = -ENODEV;
1008         return;
1009     }
1010 
1011     fidvid_msr_init();
1012 
1013     init_on_cpu->rc = 0;
1014 }
1015 
1016 #define MISSING_PSS_MSG \
1017     FW_BUG "No compatible ACPI _PSS objects found.\n" \
1018     FW_BUG "First, make sure Cool'N'Quiet is enabled in the BIOS.\n" \
1019     FW_BUG "If that doesn't help, try upgrading your BIOS.\n"
1020 
1021 /* per CPU init entry point to the driver */
1022 static int powernowk8_cpu_init(struct cpufreq_policy *pol)
1023 {
1024     struct powernow_k8_data *data;
1025     struct init_on_cpu init_on_cpu;
1026     int rc, cpu;
1027 
1028     smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1);
1029     if (rc)
1030         return -ENODEV;
1031 
1032     data = kzalloc(sizeof(*data), GFP_KERNEL);
1033     if (!data)
1034         return -ENOMEM;
1035 
1036     data->cpu = pol->cpu;
1037 
1038     if (powernow_k8_cpu_init_acpi(data)) {
1039         /*
1040          * Use the PSB BIOS structure. This is only available on
1041          * an UP version, and is deprecated by AMD.
1042          */
1043         if (num_online_cpus() != 1) {
1044             pr_err_once(MISSING_PSS_MSG);
1045             goto err_out;
1046         }
1047         if (pol->cpu != 0) {
1048             pr_err(FW_BUG "No ACPI _PSS objects for CPU other than CPU0. Complain to your BIOS vendor.\n");
1049             goto err_out;
1050         }
1051         rc = find_psb_table(data);
1052         if (rc)
1053             goto err_out;
1054 
1055         /* Take a crude guess here.
1056          * That guess was in microseconds, so multiply with 1000 */
1057         pol->cpuinfo.transition_latency = (
1058              ((data->rvo + 8) * data->vstable * VST_UNITS_20US) +
1059              ((1 << data->irt) * 30)) * 1000;
1060     } else /* ACPI _PSS objects available */
1061         pol->cpuinfo.transition_latency = get_transition_latency(data);
1062 
1063     /* only run on specific CPU from here on */
1064     init_on_cpu.data = data;
1065     smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu,
1066                  &init_on_cpu, 1);
1067     rc = init_on_cpu.rc;
1068     if (rc != 0)
1069         goto err_out_exit_acpi;
1070 
1071     cpumask_copy(pol->cpus, topology_core_cpumask(pol->cpu));
1072     data->available_cores = pol->cpus;
1073     pol->freq_table = data->powernow_table;
1074 
1075     pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n",
1076         data->currfid, data->currvid);
1077 
1078     /* Point all the CPUs in this policy to the same data */
1079     for_each_cpu(cpu, pol->cpus)
1080         per_cpu(powernow_data, cpu) = data;
1081 
1082     return 0;
1083 
1084 err_out_exit_acpi:
1085     powernow_k8_cpu_exit_acpi(data);
1086 
1087 err_out:
1088     kfree(data);
1089     return -ENODEV;
1090 }
1091 
1092 static int powernowk8_cpu_exit(struct cpufreq_policy *pol)
1093 {
1094     struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1095     int cpu;
1096 
1097     if (!data)
1098         return -EINVAL;
1099 
1100     powernow_k8_cpu_exit_acpi(data);
1101 
1102     kfree(data->powernow_table);
1103     kfree(data);
1104     for_each_cpu(cpu, pol->cpus)
1105         per_cpu(powernow_data, cpu) = NULL;
1106 
1107     return 0;
1108 }
1109 
1110 static void query_values_on_cpu(void *_err)
1111 {
1112     int *err = _err;
1113     struct powernow_k8_data *data = __this_cpu_read(powernow_data);
1114 
1115     *err = query_current_values_with_pending_wait(data);
1116 }
1117 
1118 static unsigned int powernowk8_get(unsigned int cpu)
1119 {
1120     struct powernow_k8_data *data = per_cpu(powernow_data, cpu);
1121     unsigned int khz = 0;
1122     int err;
1123 
1124     if (!data)
1125         return 0;
1126 
1127     smp_call_function_single(cpu, query_values_on_cpu, &err, true);
1128     if (err)
1129         goto out;
1130 
1131     khz = find_khz_freq_from_fid(data->currfid);
1132 
1133 
1134 out:
1135     return khz;
1136 }
1137 
1138 static struct cpufreq_driver cpufreq_amd64_driver = {
1139     .flags      = CPUFREQ_ASYNC_NOTIFICATION,
1140     .verify     = cpufreq_generic_frequency_table_verify,
1141     .target_index   = powernowk8_target,
1142     .bios_limit = acpi_processor_get_bios_limit,
1143     .init       = powernowk8_cpu_init,
1144     .exit       = powernowk8_cpu_exit,
1145     .get        = powernowk8_get,
1146     .name       = "powernow-k8",
1147     .attr       = cpufreq_generic_attr,
1148 };
1149 
1150 static void __request_acpi_cpufreq(void)
1151 {
1152     const char drv[] = "acpi-cpufreq";
1153     const char *cur_drv;
1154 
1155     cur_drv = cpufreq_get_current_driver();
1156     if (!cur_drv)
1157         goto request;
1158 
1159     if (strncmp(cur_drv, drv, min_t(size_t, strlen(cur_drv), strlen(drv))))
1160         pr_warn("WTF driver: %s\n", cur_drv);
1161 
1162     return;
1163 
1164  request:
1165     pr_warn("This CPU is not supported anymore, using acpi-cpufreq instead.\n");
1166     request_module(drv);
1167 }
1168 
1169 /* driver entry point for init */
1170 static int powernowk8_init(void)
1171 {
1172     unsigned int i, supported_cpus = 0;
1173     int ret;
1174 
1175     if (!x86_match_cpu(powernow_k8_ids))
1176         return -ENODEV;
1177 
1178     if (boot_cpu_has(X86_FEATURE_HW_PSTATE)) {
1179         __request_acpi_cpufreq();
1180         return -ENODEV;
1181     }
1182 
1183     cpus_read_lock();
1184     for_each_online_cpu(i) {
1185         smp_call_function_single(i, check_supported_cpu, &ret, 1);
1186         if (!ret)
1187             supported_cpus++;
1188     }
1189 
1190     if (supported_cpus != num_online_cpus()) {
1191         cpus_read_unlock();
1192         return -ENODEV;
1193     }
1194     cpus_read_unlock();
1195 
1196     ret = cpufreq_register_driver(&cpufreq_amd64_driver);
1197     if (ret)
1198         return ret;
1199 
1200     pr_info("Found %d %s (%d cpu cores) (" VERSION ")\n",
1201         num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus);
1202 
1203     return ret;
1204 }
1205 
1206 /* driver entry point for term */
1207 static void __exit powernowk8_exit(void)
1208 {
1209     pr_debug("exit\n");
1210 
1211     cpufreq_unregister_driver(&cpufreq_amd64_driver);
1212 }
1213 
1214 MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com>");
1215 MODULE_AUTHOR("Mark Langsdorf <mark.langsdorf@amd.com>");
1216 MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
1217 MODULE_LICENSE("GPL");
1218 
1219 late_initcall(powernowk8_init);
1220 module_exit(powernowk8_exit);
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