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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
0004  *  Copyright (C) 2004        John Steele Scott <toojays@toojays.net>
0005  *
0006  * TODO: Need a big cleanup here. Basically, we need to have different
0007  * cpufreq_driver structures for the different type of HW instead of the
0008  * current mess. We also need to better deal with the detection of the
0009  * type of machine.
0010  */
0011 
0012 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0013 
0014 #include <linux/module.h>
0015 #include <linux/types.h>
0016 #include <linux/errno.h>
0017 #include <linux/kernel.h>
0018 #include <linux/delay.h>
0019 #include <linux/sched.h>
0020 #include <linux/adb.h>
0021 #include <linux/pmu.h>
0022 #include <linux/cpufreq.h>
0023 #include <linux/init.h>
0024 #include <linux/device.h>
0025 #include <linux/hardirq.h>
0026 #include <linux/of_device.h>
0027 
0028 #include <asm/machdep.h>
0029 #include <asm/irq.h>
0030 #include <asm/pmac_feature.h>
0031 #include <asm/mmu_context.h>
0032 #include <asm/sections.h>
0033 #include <asm/cputable.h>
0034 #include <asm/time.h>
0035 #include <asm/mpic.h>
0036 #include <asm/keylargo.h>
0037 #include <asm/switch_to.h>
0038 
0039 /* WARNING !!! This will cause calibrate_delay() to be called,
0040  * but this is an __init function ! So you MUST go edit
0041  * init/main.c to make it non-init before enabling DEBUG_FREQ
0042  */
0043 #undef DEBUG_FREQ
0044 
0045 extern void low_choose_7447a_dfs(int dfs);
0046 extern void low_choose_750fx_pll(int pll);
0047 extern void low_sleep_handler(void);
0048 
0049 /*
0050  * Currently, PowerMac cpufreq supports only high & low frequencies
0051  * that are set by the firmware
0052  */
0053 static unsigned int low_freq;
0054 static unsigned int hi_freq;
0055 static unsigned int cur_freq;
0056 static unsigned int sleep_freq;
0057 static unsigned long transition_latency;
0058 
0059 /*
0060  * Different models uses different mechanisms to switch the frequency
0061  */
0062 static int (*set_speed_proc)(int low_speed);
0063 static unsigned int (*get_speed_proc)(void);
0064 
0065 /*
0066  * Some definitions used by the various speedprocs
0067  */
0068 static u32 voltage_gpio;
0069 static u32 frequency_gpio;
0070 static u32 slew_done_gpio;
0071 static int no_schedule;
0072 static int has_cpu_l2lve;
0073 static int is_pmu_based;
0074 
0075 /* There are only two frequency states for each processor. Values
0076  * are in kHz for the time being.
0077  */
0078 #define CPUFREQ_HIGH                  0
0079 #define CPUFREQ_LOW                   1
0080 
0081 static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
0082     {0, CPUFREQ_HIGH,   0},
0083     {0, CPUFREQ_LOW,    0},
0084     {0, 0,          CPUFREQ_TABLE_END},
0085 };
0086 
0087 static inline void local_delay(unsigned long ms)
0088 {
0089     if (no_schedule)
0090         mdelay(ms);
0091     else
0092         msleep(ms);
0093 }
0094 
0095 #ifdef DEBUG_FREQ
0096 static inline void debug_calc_bogomips(void)
0097 {
0098     /* This will cause a recalc of bogomips and display the
0099      * result. We backup/restore the value to avoid affecting the
0100      * core cpufreq framework's own calculation.
0101      */
0102     unsigned long save_lpj = loops_per_jiffy;
0103     calibrate_delay();
0104     loops_per_jiffy = save_lpj;
0105 }
0106 #endif /* DEBUG_FREQ */
0107 
0108 /* Switch CPU speed under 750FX CPU control
0109  */
0110 static int cpu_750fx_cpu_speed(int low_speed)
0111 {
0112     u32 hid2;
0113 
0114     if (low_speed == 0) {
0115         /* ramping up, set voltage first */
0116         pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
0117         /* Make sure we sleep for at least 1ms */
0118         local_delay(10);
0119 
0120         /* tweak L2 for high voltage */
0121         if (has_cpu_l2lve) {
0122             hid2 = mfspr(SPRN_HID2);
0123             hid2 &= ~0x2000;
0124             mtspr(SPRN_HID2, hid2);
0125         }
0126     }
0127 #ifdef CONFIG_PPC_BOOK3S_32
0128     low_choose_750fx_pll(low_speed);
0129 #endif
0130     if (low_speed == 1) {
0131         /* tweak L2 for low voltage */
0132         if (has_cpu_l2lve) {
0133             hid2 = mfspr(SPRN_HID2);
0134             hid2 |= 0x2000;
0135             mtspr(SPRN_HID2, hid2);
0136         }
0137 
0138         /* ramping down, set voltage last */
0139         pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
0140         local_delay(10);
0141     }
0142 
0143     return 0;
0144 }
0145 
0146 static unsigned int cpu_750fx_get_cpu_speed(void)
0147 {
0148     if (mfspr(SPRN_HID1) & HID1_PS)
0149         return low_freq;
0150     else
0151         return hi_freq;
0152 }
0153 
0154 /* Switch CPU speed using DFS */
0155 static int dfs_set_cpu_speed(int low_speed)
0156 {
0157     if (low_speed == 0) {
0158         /* ramping up, set voltage first */
0159         pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
0160         /* Make sure we sleep for at least 1ms */
0161         local_delay(1);
0162     }
0163 
0164     /* set frequency */
0165 #ifdef CONFIG_PPC_BOOK3S_32
0166     low_choose_7447a_dfs(low_speed);
0167 #endif
0168     udelay(100);
0169 
0170     if (low_speed == 1) {
0171         /* ramping down, set voltage last */
0172         pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
0173         local_delay(1);
0174     }
0175 
0176     return 0;
0177 }
0178 
0179 static unsigned int dfs_get_cpu_speed(void)
0180 {
0181     if (mfspr(SPRN_HID1) & HID1_DFS)
0182         return low_freq;
0183     else
0184         return hi_freq;
0185 }
0186 
0187 
0188 /* Switch CPU speed using slewing GPIOs
0189  */
0190 static int gpios_set_cpu_speed(int low_speed)
0191 {
0192     int gpio, timeout = 0;
0193 
0194     /* If ramping up, set voltage first */
0195     if (low_speed == 0) {
0196         pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
0197         /* Delay is way too big but it's ok, we schedule */
0198         local_delay(10);
0199     }
0200 
0201     /* Set frequency */
0202     gpio =  pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
0203     if (low_speed == ((gpio & 0x01) == 0))
0204         goto skip;
0205 
0206     pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
0207               low_speed ? 0x04 : 0x05);
0208     udelay(200);
0209     do {
0210         if (++timeout > 100)
0211             break;
0212         local_delay(1);
0213         gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
0214     } while((gpio & 0x02) == 0);
0215  skip:
0216     /* If ramping down, set voltage last */
0217     if (low_speed == 1) {
0218         pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
0219         /* Delay is way too big but it's ok, we schedule */
0220         local_delay(10);
0221     }
0222 
0223 #ifdef DEBUG_FREQ
0224     debug_calc_bogomips();
0225 #endif
0226 
0227     return 0;
0228 }
0229 
0230 /* Switch CPU speed under PMU control
0231  */
0232 static int pmu_set_cpu_speed(int low_speed)
0233 {
0234     struct adb_request req;
0235     unsigned long save_l2cr;
0236     unsigned long save_l3cr;
0237     unsigned int pic_prio;
0238     unsigned long flags;
0239 
0240     preempt_disable();
0241 
0242 #ifdef DEBUG_FREQ
0243     printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
0244 #endif
0245     pmu_suspend();
0246 
0247     /* Disable all interrupt sources on openpic */
0248     pic_prio = mpic_cpu_get_priority();
0249     mpic_cpu_set_priority(0xf);
0250 
0251     /* Make sure the decrementer won't interrupt us */
0252     asm volatile("mtdec %0" : : "r" (0x7fffffff));
0253     /* Make sure any pending DEC interrupt occurring while we did
0254      * the above didn't re-enable the DEC */
0255     mb();
0256     asm volatile("mtdec %0" : : "r" (0x7fffffff));
0257 
0258     /* We can now disable MSR_EE */
0259     local_irq_save(flags);
0260 
0261     /* Giveup the FPU & vec */
0262     enable_kernel_fp();
0263 
0264 #ifdef CONFIG_ALTIVEC
0265     if (cpu_has_feature(CPU_FTR_ALTIVEC))
0266         enable_kernel_altivec();
0267 #endif /* CONFIG_ALTIVEC */
0268 
0269     /* Save & disable L2 and L3 caches */
0270     save_l3cr = _get_L3CR();    /* (returns -1 if not available) */
0271     save_l2cr = _get_L2CR();    /* (returns -1 if not available) */
0272 
0273     /* Send the new speed command. My assumption is that this command
0274      * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
0275      */
0276     pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
0277     while (!req.complete)
0278         pmu_poll();
0279 
0280     /* Prepare the northbridge for the speed transition */
0281     pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
0282 
0283     /* Call low level code to backup CPU state and recover from
0284      * hardware reset
0285      */
0286     low_sleep_handler();
0287 
0288     /* Restore the northbridge */
0289     pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
0290 
0291     /* Restore L2 cache */
0292     if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
0293         _set_L2CR(save_l2cr);
0294     /* Restore L3 cache */
0295     if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
0296         _set_L3CR(save_l3cr);
0297 
0298     /* Restore userland MMU context */
0299     switch_mmu_context(NULL, current->active_mm, NULL);
0300 
0301 #ifdef DEBUG_FREQ
0302     printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
0303 #endif
0304 
0305     /* Restore low level PMU operations */
0306     pmu_unlock();
0307 
0308     /*
0309      * Restore decrementer; we'll take a decrementer interrupt
0310      * as soon as interrupts are re-enabled and the generic
0311      * clockevents code will reprogram it with the right value.
0312      */
0313     set_dec(1);
0314 
0315     /* Restore interrupts */
0316     mpic_cpu_set_priority(pic_prio);
0317 
0318     /* Let interrupts flow again ... */
0319     local_irq_restore(flags);
0320 
0321 #ifdef DEBUG_FREQ
0322     debug_calc_bogomips();
0323 #endif
0324 
0325     pmu_resume();
0326 
0327     preempt_enable();
0328 
0329     return 0;
0330 }
0331 
0332 static int do_set_cpu_speed(struct cpufreq_policy *policy, int speed_mode)
0333 {
0334     unsigned long l3cr;
0335     static unsigned long prev_l3cr;
0336 
0337     if (speed_mode == CPUFREQ_LOW &&
0338         cpu_has_feature(CPU_FTR_L3CR)) {
0339         l3cr = _get_L3CR();
0340         if (l3cr & L3CR_L3E) {
0341             prev_l3cr = l3cr;
0342             _set_L3CR(0);
0343         }
0344     }
0345     set_speed_proc(speed_mode == CPUFREQ_LOW);
0346     if (speed_mode == CPUFREQ_HIGH &&
0347         cpu_has_feature(CPU_FTR_L3CR)) {
0348         l3cr = _get_L3CR();
0349         if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
0350             _set_L3CR(prev_l3cr);
0351     }
0352     cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
0353 
0354     return 0;
0355 }
0356 
0357 static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
0358 {
0359     return cur_freq;
0360 }
0361 
0362 static int pmac_cpufreq_target( struct cpufreq_policy *policy,
0363                     unsigned int index)
0364 {
0365     int     rc;
0366 
0367     rc = do_set_cpu_speed(policy, index);
0368 
0369     ppc_proc_freq = cur_freq * 1000ul;
0370     return rc;
0371 }
0372 
0373 static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
0374 {
0375     cpufreq_generic_init(policy, pmac_cpu_freqs, transition_latency);
0376     return 0;
0377 }
0378 
0379 static u32 read_gpio(struct device_node *np)
0380 {
0381     const u32 *reg = of_get_property(np, "reg", NULL);
0382     u32 offset;
0383 
0384     if (reg == NULL)
0385         return 0;
0386     /* That works for all keylargos but shall be fixed properly
0387      * some day... The problem is that it seems we can't rely
0388      * on the "reg" property of the GPIO nodes, they are either
0389      * relative to the base of KeyLargo or to the base of the
0390      * GPIO space, and the device-tree doesn't help.
0391      */
0392     offset = *reg;
0393     if (offset < KEYLARGO_GPIO_LEVELS0)
0394         offset += KEYLARGO_GPIO_LEVELS0;
0395     return offset;
0396 }
0397 
0398 static int pmac_cpufreq_suspend(struct cpufreq_policy *policy)
0399 {
0400     /* Ok, this could be made a bit smarter, but let's be robust for now. We
0401      * always force a speed change to high speed before sleep, to make sure
0402      * we have appropriate voltage and/or bus speed for the wakeup process,
0403      * and to make sure our loops_per_jiffies are "good enough", that is will
0404      * not cause too short delays if we sleep in low speed and wake in high
0405      * speed..
0406      */
0407     no_schedule = 1;
0408     sleep_freq = cur_freq;
0409     if (cur_freq == low_freq && !is_pmu_based)
0410         do_set_cpu_speed(policy, CPUFREQ_HIGH);
0411     return 0;
0412 }
0413 
0414 static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
0415 {
0416     /* If we resume, first check if we have a get() function */
0417     if (get_speed_proc)
0418         cur_freq = get_speed_proc();
0419     else
0420         cur_freq = 0;
0421 
0422     /* We don't, hrm... we don't really know our speed here, best
0423      * is that we force a switch to whatever it was, which is
0424      * probably high speed due to our suspend() routine
0425      */
0426     do_set_cpu_speed(policy, sleep_freq == low_freq ?
0427              CPUFREQ_LOW : CPUFREQ_HIGH);
0428 
0429     ppc_proc_freq = cur_freq * 1000ul;
0430 
0431     no_schedule = 0;
0432     return 0;
0433 }
0434 
0435 static struct cpufreq_driver pmac_cpufreq_driver = {
0436     .verify     = cpufreq_generic_frequency_table_verify,
0437     .target_index   = pmac_cpufreq_target,
0438     .get        = pmac_cpufreq_get_speed,
0439     .init       = pmac_cpufreq_cpu_init,
0440     .suspend    = pmac_cpufreq_suspend,
0441     .resume     = pmac_cpufreq_resume,
0442     .flags      = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
0443     .attr       = cpufreq_generic_attr,
0444     .name       = "powermac",
0445 };
0446 
0447 
0448 static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
0449 {
0450     struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
0451                                 "voltage-gpio");
0452     struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
0453                                 "frequency-gpio");
0454     struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
0455                                      "slewing-done");
0456     const u32 *value;
0457 
0458     /*
0459      * Check to see if it's GPIO driven or PMU only
0460      *
0461      * The way we extract the GPIO address is slightly hackish, but it
0462      * works well enough for now. We need to abstract the whole GPIO
0463      * stuff sooner or later anyway
0464      */
0465 
0466     if (volt_gpio_np)
0467         voltage_gpio = read_gpio(volt_gpio_np);
0468     if (freq_gpio_np)
0469         frequency_gpio = read_gpio(freq_gpio_np);
0470     if (slew_done_gpio_np)
0471         slew_done_gpio = read_gpio(slew_done_gpio_np);
0472 
0473     of_node_put(volt_gpio_np);
0474     of_node_put(freq_gpio_np);
0475     of_node_put(slew_done_gpio_np);
0476 
0477     /* If we use the frequency GPIOs, calculate the min/max speeds based
0478      * on the bus frequencies
0479      */
0480     if (frequency_gpio && slew_done_gpio) {
0481         int lenp, rc;
0482         const u32 *freqs, *ratio;
0483 
0484         freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
0485         lenp /= sizeof(u32);
0486         if (freqs == NULL || lenp != 2) {
0487             pr_err("bus-frequencies incorrect or missing\n");
0488             return 1;
0489         }
0490         ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
0491                         NULL);
0492         if (ratio == NULL) {
0493             pr_err("processor-to-bus-ratio*2 missing\n");
0494             return 1;
0495         }
0496 
0497         /* Get the min/max bus frequencies */
0498         low_freq = min(freqs[0], freqs[1]);
0499         hi_freq = max(freqs[0], freqs[1]);
0500 
0501         /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
0502          * frequency, it claims it to be around 84Mhz on some models while
0503          * it appears to be approx. 101Mhz on all. Let's hack around here...
0504          * fortunately, we don't need to be too precise
0505          */
0506         if (low_freq < 98000000)
0507             low_freq = 101000000;
0508 
0509         /* Convert those to CPU core clocks */
0510         low_freq = (low_freq * (*ratio)) / 2000;
0511         hi_freq = (hi_freq * (*ratio)) / 2000;
0512 
0513         /* Now we get the frequencies, we read the GPIO to see what is out current
0514          * speed
0515          */
0516         rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
0517         cur_freq = (rc & 0x01) ? hi_freq : low_freq;
0518 
0519         set_speed_proc = gpios_set_cpu_speed;
0520         return 1;
0521     }
0522 
0523     /* If we use the PMU, look for the min & max frequencies in the
0524      * device-tree
0525      */
0526     value = of_get_property(cpunode, "min-clock-frequency", NULL);
0527     if (!value)
0528         return 1;
0529     low_freq = (*value) / 1000;
0530     /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
0531      * here */
0532     if (low_freq < 100000)
0533         low_freq *= 10;
0534 
0535     value = of_get_property(cpunode, "max-clock-frequency", NULL);
0536     if (!value)
0537         return 1;
0538     hi_freq = (*value) / 1000;
0539     set_speed_proc = pmu_set_cpu_speed;
0540     is_pmu_based = 1;
0541 
0542     return 0;
0543 }
0544 
0545 static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
0546 {
0547     struct device_node *volt_gpio_np;
0548 
0549     if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
0550         return 1;
0551 
0552     volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
0553     if (volt_gpio_np)
0554         voltage_gpio = read_gpio(volt_gpio_np);
0555     of_node_put(volt_gpio_np);
0556     if (!voltage_gpio){
0557         pr_err("missing cpu-vcore-select gpio\n");
0558         return 1;
0559     }
0560 
0561     /* OF only reports the high frequency */
0562     hi_freq = cur_freq;
0563     low_freq = cur_freq/2;
0564 
0565     /* Read actual frequency from CPU */
0566     cur_freq = dfs_get_cpu_speed();
0567     set_speed_proc = dfs_set_cpu_speed;
0568     get_speed_proc = dfs_get_cpu_speed;
0569 
0570     return 0;
0571 }
0572 
0573 static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
0574 {
0575     struct device_node *volt_gpio_np;
0576     u32 pvr;
0577     const u32 *value;
0578 
0579     if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
0580         return 1;
0581 
0582     hi_freq = cur_freq;
0583     value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
0584     if (!value)
0585         return 1;
0586     low_freq = (*value) / 1000;
0587 
0588     volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
0589     if (volt_gpio_np)
0590         voltage_gpio = read_gpio(volt_gpio_np);
0591 
0592     of_node_put(volt_gpio_np);
0593     pvr = mfspr(SPRN_PVR);
0594     has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
0595 
0596     set_speed_proc = cpu_750fx_cpu_speed;
0597     get_speed_proc = cpu_750fx_get_cpu_speed;
0598     cur_freq = cpu_750fx_get_cpu_speed();
0599 
0600     return 0;
0601 }
0602 
0603 /* Currently, we support the following machines:
0604  *
0605  *  - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
0606  *  - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
0607  *  - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
0608  *  - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
0609  *  - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
0610  *  - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
0611  *  - Recent MacRISC3 laptops
0612  *  - All new machines with 7447A CPUs
0613  */
0614 static int __init pmac_cpufreq_setup(void)
0615 {
0616     struct device_node  *cpunode;
0617     const u32       *value;
0618 
0619     if (strstr(boot_command_line, "nocpufreq"))
0620         return 0;
0621 
0622     /* Get first CPU node */
0623     cpunode = of_cpu_device_node_get(0);
0624     if (!cpunode)
0625         goto out;
0626 
0627     /* Get current cpu clock freq */
0628     value = of_get_property(cpunode, "clock-frequency", NULL);
0629     if (!value)
0630         goto out;
0631     cur_freq = (*value) / 1000;
0632 
0633     /*  Check for 7447A based MacRISC3 */
0634     if (of_machine_is_compatible("MacRISC3") &&
0635         of_get_property(cpunode, "dynamic-power-step", NULL) &&
0636         PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
0637         pmac_cpufreq_init_7447A(cpunode);
0638 
0639         /* Allow dynamic switching */
0640         transition_latency = 8000000;
0641         pmac_cpufreq_driver.flags &= ~CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING;
0642     /* Check for other MacRISC3 machines */
0643     } else if (of_machine_is_compatible("PowerBook3,4") ||
0644            of_machine_is_compatible("PowerBook3,5") ||
0645            of_machine_is_compatible("MacRISC3")) {
0646         pmac_cpufreq_init_MacRISC3(cpunode);
0647     /* Else check for iBook2 500/600 */
0648     } else if (of_machine_is_compatible("PowerBook4,1")) {
0649         hi_freq = cur_freq;
0650         low_freq = 400000;
0651         set_speed_proc = pmu_set_cpu_speed;
0652         is_pmu_based = 1;
0653     }
0654     /* Else check for TiPb 550 */
0655     else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
0656         hi_freq = cur_freq;
0657         low_freq = 500000;
0658         set_speed_proc = pmu_set_cpu_speed;
0659         is_pmu_based = 1;
0660     }
0661     /* Else check for TiPb 400 & 500 */
0662     else if (of_machine_is_compatible("PowerBook3,2")) {
0663         /* We only know about the 400 MHz and the 500Mhz model
0664          * they both have 300 MHz as low frequency
0665          */
0666         if (cur_freq < 350000 || cur_freq > 550000)
0667             goto out;
0668         hi_freq = cur_freq;
0669         low_freq = 300000;
0670         set_speed_proc = pmu_set_cpu_speed;
0671         is_pmu_based = 1;
0672     }
0673     /* Else check for 750FX */
0674     else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
0675         pmac_cpufreq_init_750FX(cpunode);
0676 out:
0677     of_node_put(cpunode);
0678     if (set_speed_proc == NULL)
0679         return -ENODEV;
0680 
0681     pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
0682     pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
0683     ppc_proc_freq = cur_freq * 1000ul;
0684 
0685     pr_info("Registering PowerMac CPU frequency driver\n");
0686     pr_info("Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
0687         low_freq/1000, hi_freq/1000, cur_freq/1000);
0688 
0689     return cpufreq_register_driver(&pmac_cpufreq_driver);
0690 }
0691 
0692 module_init(pmac_cpufreq_setup);
0693
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