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0008 #include <linux/kernel.h>
0009 #include <linux/module.h>
0010 #include <linux/clk.h>
0011 #include <linux/cpufreq.h>
0012 #include <linux/of_device.h>
0013 #include <linux/platform_device.h>
0014 #include <linux/io.h>
0015 #include <asm/proc-fns.h>
0016
0017 #define CPU_SW_INT_BLK BIT(28)
0018
0019 static struct priv
0020 {
0021 struct clk *cpu_clk;
0022 struct clk *ddr_clk;
0023 struct clk *powersave_clk;
0024 struct device *dev;
0025 void __iomem *base;
0026 } priv;
0027
0028 #define STATE_CPU_FREQ 0x01
0029 #define STATE_DDR_FREQ 0x02
0030
0031
0032
0033
0034
0035
0036
0037
0038
0039 static struct cpufreq_frequency_table kirkwood_freq_table[] = {
0040 {0, STATE_CPU_FREQ, 0},
0041 {0, STATE_DDR_FREQ, 0},
0042 {0, 0, CPUFREQ_TABLE_END},
0043 };
0044
0045 static unsigned int kirkwood_cpufreq_get_cpu_frequency(unsigned int cpu)
0046 {
0047 return clk_get_rate(priv.powersave_clk) / 1000;
0048 }
0049
0050 static int kirkwood_cpufreq_target(struct cpufreq_policy *policy,
0051 unsigned int index)
0052 {
0053 unsigned int state = kirkwood_freq_table[index].driver_data;
0054 unsigned long reg;
0055
0056 local_irq_disable();
0057
0058
0059 reg = readl_relaxed(priv.base);
0060 reg |= CPU_SW_INT_BLK;
0061 writel_relaxed(reg, priv.base);
0062
0063 switch (state) {
0064 case STATE_CPU_FREQ:
0065 clk_set_parent(priv.powersave_clk, priv.cpu_clk);
0066 break;
0067 case STATE_DDR_FREQ:
0068 clk_set_parent(priv.powersave_clk, priv.ddr_clk);
0069 break;
0070 }
0071
0072
0073 cpu_do_idle();
0074
0075
0076 reg = readl_relaxed(priv.base);
0077 reg &= ~CPU_SW_INT_BLK;
0078 writel_relaxed(reg, priv.base);
0079
0080 local_irq_enable();
0081
0082 return 0;
0083 }
0084
0085
0086 static int kirkwood_cpufreq_cpu_init(struct cpufreq_policy *policy)
0087 {
0088 cpufreq_generic_init(policy, kirkwood_freq_table, 5000);
0089 return 0;
0090 }
0091
0092 static struct cpufreq_driver kirkwood_cpufreq_driver = {
0093 .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
0094 .get = kirkwood_cpufreq_get_cpu_frequency,
0095 .verify = cpufreq_generic_frequency_table_verify,
0096 .target_index = kirkwood_cpufreq_target,
0097 .init = kirkwood_cpufreq_cpu_init,
0098 .name = "kirkwood-cpufreq",
0099 .attr = cpufreq_generic_attr,
0100 };
0101
0102 static int kirkwood_cpufreq_probe(struct platform_device *pdev)
0103 {
0104 struct device_node *np;
0105 int err;
0106
0107 priv.dev = &pdev->dev;
0108
0109 priv.base = devm_platform_ioremap_resource(pdev, 0);
0110 if (IS_ERR(priv.base))
0111 return PTR_ERR(priv.base);
0112
0113 np = of_cpu_device_node_get(0);
0114 if (!np) {
0115 dev_err(&pdev->dev, "failed to get cpu device node\n");
0116 return -ENODEV;
0117 }
0118
0119 priv.cpu_clk = of_clk_get_by_name(np, "cpu_clk");
0120 if (IS_ERR(priv.cpu_clk)) {
0121 dev_err(priv.dev, "Unable to get cpuclk\n");
0122 err = PTR_ERR(priv.cpu_clk);
0123 goto out_node;
0124 }
0125
0126 err = clk_prepare_enable(priv.cpu_clk);
0127 if (err) {
0128 dev_err(priv.dev, "Unable to prepare cpuclk\n");
0129 goto out_node;
0130 }
0131
0132 kirkwood_freq_table[0].frequency = clk_get_rate(priv.cpu_clk) / 1000;
0133
0134 priv.ddr_clk = of_clk_get_by_name(np, "ddrclk");
0135 if (IS_ERR(priv.ddr_clk)) {
0136 dev_err(priv.dev, "Unable to get ddrclk\n");
0137 err = PTR_ERR(priv.ddr_clk);
0138 goto out_cpu;
0139 }
0140
0141 err = clk_prepare_enable(priv.ddr_clk);
0142 if (err) {
0143 dev_err(priv.dev, "Unable to prepare ddrclk\n");
0144 goto out_cpu;
0145 }
0146 kirkwood_freq_table[1].frequency = clk_get_rate(priv.ddr_clk) / 1000;
0147
0148 priv.powersave_clk = of_clk_get_by_name(np, "powersave");
0149 if (IS_ERR(priv.powersave_clk)) {
0150 dev_err(priv.dev, "Unable to get powersave\n");
0151 err = PTR_ERR(priv.powersave_clk);
0152 goto out_ddr;
0153 }
0154 err = clk_prepare_enable(priv.powersave_clk);
0155 if (err) {
0156 dev_err(priv.dev, "Unable to prepare powersave clk\n");
0157 goto out_ddr;
0158 }
0159
0160 err = cpufreq_register_driver(&kirkwood_cpufreq_driver);
0161 if (err) {
0162 dev_err(priv.dev, "Failed to register cpufreq driver\n");
0163 goto out_powersave;
0164 }
0165
0166 of_node_put(np);
0167 return 0;
0168
0169 out_powersave:
0170 clk_disable_unprepare(priv.powersave_clk);
0171 out_ddr:
0172 clk_disable_unprepare(priv.ddr_clk);
0173 out_cpu:
0174 clk_disable_unprepare(priv.cpu_clk);
0175 out_node:
0176 of_node_put(np);
0177
0178 return err;
0179 }
0180
0181 static int kirkwood_cpufreq_remove(struct platform_device *pdev)
0182 {
0183 cpufreq_unregister_driver(&kirkwood_cpufreq_driver);
0184
0185 clk_disable_unprepare(priv.powersave_clk);
0186 clk_disable_unprepare(priv.ddr_clk);
0187 clk_disable_unprepare(priv.cpu_clk);
0188
0189 return 0;
0190 }
0191
0192 static struct platform_driver kirkwood_cpufreq_platform_driver = {
0193 .probe = kirkwood_cpufreq_probe,
0194 .remove = kirkwood_cpufreq_remove,
0195 .driver = {
0196 .name = "kirkwood-cpufreq",
0197 },
0198 };
0199
0200 module_platform_driver(kirkwood_cpufreq_platform_driver);
0201
0202 MODULE_LICENSE("GPL v2");
0203 MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch");
0204 MODULE_DESCRIPTION("cpufreq driver for Marvell's kirkwood CPU");
0205 MODULE_ALIAS("platform:kirkwood-cpufreq");