drivers/cpufreq/cpufreq-dt-platdev.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2016 Linaro.
0004  * Viresh Kumar <viresh.kumar@linaro.org>
0005  */
0006
0007 #include <linux/err.h>
0008 #include <linux/of.h>
0009 #include <linux/of_device.h>
0010 #include <linux/platform_device.h>
0011
0012 #include "cpufreq-dt.h"
0013
0014 /*
0015  * Machines for which the cpufreq device is *always* created, mostly used for
0016  * platforms using "operating-points" (V1) property.
0017  */
0018 static const struct of_device_id allowlist[] __initconst = {
0019     { .compatible = "allwinner,sun4i-a10", },
0020     { .compatible = "allwinner,sun5i-a10s", },
0021     { .compatible = "allwinner,sun5i-a13", },
0022     { .compatible = "allwinner,sun5i-r8", },
0023     { .compatible = "allwinner,sun6i-a31", },
0024     { .compatible = "allwinner,sun6i-a31s", },
0025     { .compatible = "allwinner,sun7i-a20", },
0026     { .compatible = "allwinner,sun8i-a23", },
0027     { .compatible = "allwinner,sun8i-a83t", },
0028     { .compatible = "allwinner,sun8i-h3", },
0029
0030     { .compatible = "apm,xgene-shadowcat", },
0031
0032     { .compatible = "arm,integrator-ap", },
0033     { .compatible = "arm,integrator-cp", },
0034
0035     { .compatible = "hisilicon,hi3660", },
0036
0037     { .compatible = "fsl,imx27", },
0038     { .compatible = "fsl,imx51", },
0039     { .compatible = "fsl,imx53", },
0040
0041     { .compatible = "marvell,berlin", },
0042     { .compatible = "marvell,pxa250", },
0043     { .compatible = "marvell,pxa270", },
0044
0045     { .compatible = "samsung,exynos3250", },
0046     { .compatible = "samsung,exynos4210", },
0047     { .compatible = "samsung,exynos5250", },
0048 #ifndef CONFIG_BL_SWITCHER
0049     { .compatible = "samsung,exynos5800", },
0050 #endif
0051
0052     { .compatible = "renesas,emev2", },
0053     { .compatible = "renesas,r7s72100", },
0054     { .compatible = "renesas,r8a73a4", },
0055     { .compatible = "renesas,r8a7740", },
0056     { .compatible = "renesas,r8a7742", },
0057     { .compatible = "renesas,r8a7743", },
0058     { .compatible = "renesas,r8a7744", },
0059     { .compatible = "renesas,r8a7745", },
0060     { .compatible = "renesas,r8a7778", },
0061     { .compatible = "renesas,r8a7779", },
0062     { .compatible = "renesas,r8a7790", },
0063     { .compatible = "renesas,r8a7791", },
0064     { .compatible = "renesas,r8a7792", },
0065     { .compatible = "renesas,r8a7793", },
0066     { .compatible = "renesas,r8a7794", },
0067     { .compatible = "renesas,sh73a0", },
0068
0069     { .compatible = "rockchip,rk2928", },
0070     { .compatible = "rockchip,rk3036", },
0071     { .compatible = "rockchip,rk3066a", },
0072     { .compatible = "rockchip,rk3066b", },
0073     { .compatible = "rockchip,rk3188", },
0074     { .compatible = "rockchip,rk3228", },
0075     { .compatible = "rockchip,rk3288", },
0076     { .compatible = "rockchip,rk3328", },
0077     { .compatible = "rockchip,rk3366", },
0078     { .compatible = "rockchip,rk3368", },
0079     { .compatible = "rockchip,rk3399",
0080       .data = &(struct cpufreq_dt_platform_data)
0081         { .have_governor_per_policy = true, },
0082     },
0083
0084     { .compatible = "st-ericsson,u8500", },
0085     { .compatible = "st-ericsson,u8540", },
0086     { .compatible = "st-ericsson,u9500", },
0087     { .compatible = "st-ericsson,u9540", },
0088
0089     { .compatible = "ti,omap2", },
0090     { .compatible = "ti,omap4", },
0091     { .compatible = "ti,omap5", },
0092
0093     { .compatible = "xlnx,zynq-7000", },
0094     { .compatible = "xlnx,zynqmp", },
0095
0096     { }
0097 };
0098
0099 /*
0100  * Machines for which the cpufreq device is *not* created, mostly used for
0101  * platforms using "operating-points-v2" property.
0102  */
0103 static const struct of_device_id blocklist[] __initconst = {
0104     { .compatible = "allwinner,sun50i-h6", },
0105
0106     { .compatible = "arm,vexpress", },
0107
0108     { .compatible = "calxeda,highbank", },
0109     { .compatible = "calxeda,ecx-2000", },
0110
0111     { .compatible = "fsl,imx7ulp", },
0112     { .compatible = "fsl,imx7d", },
0113     { .compatible = "fsl,imx7s", },
0114     { .compatible = "fsl,imx8mq", },
0115     { .compatible = "fsl,imx8mm", },
0116     { .compatible = "fsl,imx8mn", },
0117     { .compatible = "fsl,imx8mp", },
0118
0119     { .compatible = "marvell,armadaxp", },
0120
0121     { .compatible = "mediatek,mt2701", },
0122     { .compatible = "mediatek,mt2712", },
0123     { .compatible = "mediatek,mt7622", },
0124     { .compatible = "mediatek,mt7623", },
0125     { .compatible = "mediatek,mt8167", },
0126     { .compatible = "mediatek,mt817x", },
0127     { .compatible = "mediatek,mt8173", },
0128     { .compatible = "mediatek,mt8176", },
0129     { .compatible = "mediatek,mt8183", },
0130     { .compatible = "mediatek,mt8186", },
0131     { .compatible = "mediatek,mt8365", },
0132     { .compatible = "mediatek,mt8516", },
0133
0134     { .compatible = "nvidia,tegra20", },
0135     { .compatible = "nvidia,tegra30", },
0136     { .compatible = "nvidia,tegra124", },
0137     { .compatible = "nvidia,tegra210", },
0138
0139     { .compatible = "qcom,apq8096", },
0140     { .compatible = "qcom,msm8996", },
0141     { .compatible = "qcom,qcs404", },
0142     { .compatible = "qcom,sa8155p" },
0143     { .compatible = "qcom,sa8540p" },
0144     { .compatible = "qcom,sc7180", },
0145     { .compatible = "qcom,sc7280", },
0146     { .compatible = "qcom,sc8180x", },
0147     { .compatible = "qcom,sc8280xp", },
0148     { .compatible = "qcom,sdm845", },
0149     { .compatible = "qcom,sm6350", },
0150     { .compatible = "qcom,sm8150", },
0151     { .compatible = "qcom,sm8250", },
0152     { .compatible = "qcom,sm8350", },
0153
0154     { .compatible = "st,stih407", },
0155     { .compatible = "st,stih410", },
0156     { .compatible = "st,stih418", },
0157
0158     { .compatible = "ti,am33xx", },
0159     { .compatible = "ti,am43", },
0160     { .compatible = "ti,dra7", },
0161     { .compatible = "ti,omap3", },
0162
0163     { .compatible = "qcom,ipq8064", },
0164     { .compatible = "qcom,apq8064", },
0165     { .compatible = "qcom,msm8974", },
0166     { .compatible = "qcom,msm8960", },
0167
0168     { }
0169 };
0170
0171 static bool __init cpu0_node_has_opp_v2_prop(void)
0172 {
0173     struct device_node *np = of_cpu_device_node_get(0);
0174     bool ret = false;
0175
0176     if (of_get_property(np, "operating-points-v2", NULL))
0177         ret = true;
0178
0179     of_node_put(np);
0180     return ret;
0181 }
0182
0183 static int __init cpufreq_dt_platdev_init(void)
0184 {
0185     struct device_node *np = of_find_node_by_path("/");
0186     const struct of_device_id *match;
0187     const void *data = NULL;
0188
0189     if (!np)
0190         return -ENODEV;
0191
0192     match = of_match_node(allowlist, np);
0193     if (match) {
0194         data = match->data;
0195         goto create_pdev;
0196     }
0197
0198     if (cpu0_node_has_opp_v2_prop() && !of_match_node(blocklist, np))
0199         goto create_pdev;
0200
0201     of_node_put(np);
0202     return -ENODEV;
0203
0204 create_pdev:
0205     of_node_put(np);
0206     return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
0207                    -1, data,
0208                    sizeof(struct cpufreq_dt_platform_data)));
0209 }
0210 core_initcall(cpufreq_dt_platdev_init);