drivers/clocksource/timer-zevio.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  linux/drivers/clocksource/zevio-timer.c
0004  *
0005  *  Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
0006  */
0007
0008 #include <linux/io.h>
0009 #include <linux/irq.h>
0010 #include <linux/of.h>
0011 #include <linux/of_address.h>
0012 #include <linux/of_irq.h>
0013 #include <linux/clk.h>
0014 #include <linux/clockchips.h>
0015 #include <linux/cpumask.h>
0016 #include <linux/interrupt.h>
0017 #include <linux/slab.h>
0018
0019 #define IO_CURRENT_VAL  0x00
0020 #define IO_DIVIDER  0x04
0021 #define IO_CONTROL  0x08
0022
0023 #define IO_TIMER1   0x00
0024 #define IO_TIMER2   0x0C
0025
0026 #define IO_MATCH_BEGIN  0x18
0027 #define IO_MATCH(x) (IO_MATCH_BEGIN + ((x) << 2))
0028
0029 #define IO_INTR_STS 0x00
0030 #define IO_INTR_ACK 0x00
0031 #define IO_INTR_MSK 0x04
0032
0033 #define CNTL_STOP_TIMER (1 << 4)
0034 #define CNTL_RUN_TIMER  (0 << 4)
0035
0036 #define CNTL_INC    (1 << 3)
0037 #define CNTL_DEC    (0 << 3)
0038
0039 #define CNTL_TOZERO 0
0040 #define CNTL_MATCH(x)   ((x) + 1)
0041 #define CNTL_FOREVER    7
0042
0043 /* There are 6 match registers but we only use one. */
0044 #define TIMER_MATCH 0
0045
0046 #define TIMER_INTR_MSK  (1 << (TIMER_MATCH))
0047 #define TIMER_INTR_ALL  0x3F
0048
0049 struct zevio_timer {
0050     void __iomem *base;
0051     void __iomem *timer1, *timer2;
0052     void __iomem *interrupt_regs;
0053
0054     struct clk *clk;
0055     struct clock_event_device clkevt;
0056
0057     char clocksource_name[64];
0058     char clockevent_name[64];
0059 };
0060
0061 static int zevio_timer_set_event(unsigned long delta,
0062                  struct clock_event_device *dev)
0063 {
0064     struct zevio_timer *timer = container_of(dev, struct zevio_timer,
0065                          clkevt);
0066
0067     writel(delta, timer->timer1 + IO_CURRENT_VAL);
0068     writel(CNTL_RUN_TIMER | CNTL_DEC | CNTL_MATCH(TIMER_MATCH),
0069             timer->timer1 + IO_CONTROL);
0070
0071     return 0;
0072 }
0073
0074 static int zevio_timer_shutdown(struct clock_event_device *dev)
0075 {
0076     struct zevio_timer *timer = container_of(dev, struct zevio_timer,
0077                          clkevt);
0078
0079     /* Disable timer interrupts */
0080     writel(0, timer->interrupt_regs + IO_INTR_MSK);
0081     writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK);
0082     /* Stop timer */
0083     writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL);
0084     return 0;
0085 }
0086
0087 static int zevio_timer_set_oneshot(struct clock_event_device *dev)
0088 {
0089     struct zevio_timer *timer = container_of(dev, struct zevio_timer,
0090                          clkevt);
0091
0092     /* Enable timer interrupts */
0093     writel(TIMER_INTR_MSK, timer->interrupt_regs + IO_INTR_MSK);
0094     writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK);
0095     return 0;
0096 }
0097
0098 static irqreturn_t zevio_timer_interrupt(int irq, void *dev_id)
0099 {
0100     struct zevio_timer *timer = dev_id;
0101     u32 intr;
0102
0103     intr = readl(timer->interrupt_regs + IO_INTR_ACK);
0104     if (!(intr & TIMER_INTR_MSK))
0105         return IRQ_NONE;
0106
0107     writel(TIMER_INTR_MSK, timer->interrupt_regs + IO_INTR_ACK);
0108     writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL);
0109
0110     if (timer->clkevt.event_handler)
0111         timer->clkevt.event_handler(&timer->clkevt);
0112
0113     return IRQ_HANDLED;
0114 }
0115
0116 static int __init zevio_timer_add(struct device_node *node)
0117 {
0118     struct zevio_timer *timer;
0119     struct resource res;
0120     int irqnr, ret;
0121
0122     timer = kzalloc(sizeof(*timer), GFP_KERNEL);
0123     if (!timer)
0124         return -ENOMEM;
0125
0126     timer->base = of_iomap(node, 0);
0127     if (!timer->base) {
0128         ret = -EINVAL;
0129         goto error_free;
0130     }
0131     timer->timer1 = timer->base + IO_TIMER1;
0132     timer->timer2 = timer->base + IO_TIMER2;
0133
0134     timer->clk = of_clk_get(node, 0);
0135     if (IS_ERR(timer->clk)) {
0136         ret = PTR_ERR(timer->clk);
0137         pr_err("Timer clock not found! (error %d)\n", ret);
0138         goto error_unmap;
0139     }
0140
0141     timer->interrupt_regs = of_iomap(node, 1);
0142     irqnr = irq_of_parse_and_map(node, 0);
0143
0144     of_address_to_resource(node, 0, &res);
0145     scnprintf(timer->clocksource_name, sizeof(timer->clocksource_name),
0146             "%llx.%pOFn_clocksource",
0147             (unsigned long long)res.start, node);
0148
0149     scnprintf(timer->clockevent_name, sizeof(timer->clockevent_name),
0150             "%llx.%pOFn_clockevent",
0151             (unsigned long long)res.start, node);
0152
0153     if (timer->interrupt_regs && irqnr) {
0154         timer->clkevt.name      = timer->clockevent_name;
0155         timer->clkevt.set_next_event    = zevio_timer_set_event;
0156         timer->clkevt.set_state_shutdown = zevio_timer_shutdown;
0157         timer->clkevt.set_state_oneshot = zevio_timer_set_oneshot;
0158         timer->clkevt.tick_resume   = zevio_timer_set_oneshot;
0159         timer->clkevt.rating        = 200;
0160         timer->clkevt.cpumask       = cpu_possible_mask;
0161         timer->clkevt.features      = CLOCK_EVT_FEAT_ONESHOT;
0162         timer->clkevt.irq       = irqnr;
0163
0164         writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL);
0165         writel(0, timer->timer1 + IO_DIVIDER);
0166
0167         /* Start with timer interrupts disabled */
0168         writel(0, timer->interrupt_regs + IO_INTR_MSK);
0169         writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK);
0170
0171         /* Interrupt to occur when timer value matches 0 */
0172         writel(0, timer->base + IO_MATCH(TIMER_MATCH));
0173
0174         if (request_irq(irqnr, zevio_timer_interrupt,
0175                 IRQF_TIMER | IRQF_IRQPOLL,
0176                 timer->clockevent_name, timer)) {
0177             pr_err("%s: request_irq() failed\n",
0178                    timer->clockevent_name);
0179         }
0180
0181         clockevents_config_and_register(&timer->clkevt,
0182                 clk_get_rate(timer->clk), 0x0001, 0xffff);
0183         pr_info("Added %s as clockevent\n", timer->clockevent_name);
0184     }
0185
0186     writel(CNTL_STOP_TIMER, timer->timer2 + IO_CONTROL);
0187     writel(0, timer->timer2 + IO_CURRENT_VAL);
0188     writel(0, timer->timer2 + IO_DIVIDER);
0189     writel(CNTL_RUN_TIMER | CNTL_FOREVER | CNTL_INC,
0190             timer->timer2 + IO_CONTROL);
0191
0192     clocksource_mmio_init(timer->timer2 + IO_CURRENT_VAL,
0193             timer->clocksource_name,
0194             clk_get_rate(timer->clk),
0195             200, 16,
0196             clocksource_mmio_readw_up);
0197
0198     pr_info("Added %s as clocksource\n", timer->clocksource_name);
0199
0200     return 0;
0201 error_unmap:
0202     iounmap(timer->base);
0203 error_free:
0204     kfree(timer);
0205     return ret;
0206 }
0207
0208 static int __init zevio_timer_init(struct device_node *node)
0209 {
0210     return zevio_timer_add(node);
0211 }
0212
0213 TIMER_OF_DECLARE(zevio_timer, "lsi,zevio-timer", zevio_timer_init);