0001
0002
0003
0004
0005
0006 #include <linux/clk.h>
0007 #include <linux/interrupt.h>
0008 #include <linux/irq.h>
0009 #include <linux/irqreturn.h>
0010 #include <linux/sched_clock.h>
0011 #include "timer-of.h"
0012
0013 #define MLB_TMR_TMCSR_OFS 0x0
0014 #define MLB_TMR_TMR_OFS 0x4
0015 #define MLB_TMR_TMRLR1_OFS 0x8
0016 #define MLB_TMR_TMRLR2_OFS 0xc
0017 #define MLB_TMR_REGSZPCH 0x10
0018
0019 #define MLB_TMR_TMCSR_OUTL BIT(5)
0020 #define MLB_TMR_TMCSR_RELD BIT(4)
0021 #define MLB_TMR_TMCSR_INTE BIT(3)
0022 #define MLB_TMR_TMCSR_UF BIT(2)
0023 #define MLB_TMR_TMCSR_CNTE BIT(1)
0024 #define MLB_TMR_TMCSR_TRG BIT(0)
0025
0026 #define MLB_TMR_TMCSR_CSL_DIV2 0
0027 #define MLB_TMR_DIV_CNT 2
0028
0029 #define MLB_TMR_SRC_CH 1
0030 #define MLB_TMR_EVT_CH 0
0031
0032 #define MLB_TMR_SRC_CH_OFS (MLB_TMR_REGSZPCH * MLB_TMR_SRC_CH)
0033 #define MLB_TMR_EVT_CH_OFS (MLB_TMR_REGSZPCH * MLB_TMR_EVT_CH)
0034
0035 #define MLB_TMR_SRC_TMCSR_OFS (MLB_TMR_SRC_CH_OFS + MLB_TMR_TMCSR_OFS)
0036 #define MLB_TMR_SRC_TMR_OFS (MLB_TMR_SRC_CH_OFS + MLB_TMR_TMR_OFS)
0037 #define MLB_TMR_SRC_TMRLR1_OFS (MLB_TMR_SRC_CH_OFS + MLB_TMR_TMRLR1_OFS)
0038 #define MLB_TMR_SRC_TMRLR2_OFS (MLB_TMR_SRC_CH_OFS + MLB_TMR_TMRLR2_OFS)
0039
0040 #define MLB_TMR_EVT_TMCSR_OFS (MLB_TMR_EVT_CH_OFS + MLB_TMR_TMCSR_OFS)
0041 #define MLB_TMR_EVT_TMR_OFS (MLB_TMR_EVT_CH_OFS + MLB_TMR_TMR_OFS)
0042 #define MLB_TMR_EVT_TMRLR1_OFS (MLB_TMR_EVT_CH_OFS + MLB_TMR_TMRLR1_OFS)
0043 #define MLB_TMR_EVT_TMRLR2_OFS (MLB_TMR_EVT_CH_OFS + MLB_TMR_TMRLR2_OFS)
0044
0045 #define MLB_TIMER_RATING 500
0046 #define MLB_TIMER_ONESHOT 0
0047 #define MLB_TIMER_PERIODIC 1
0048
0049 static irqreturn_t mlb_timer_interrupt(int irq, void *dev_id)
0050 {
0051 struct clock_event_device *clk = dev_id;
0052 struct timer_of *to = to_timer_of(clk);
0053 u32 val;
0054
0055 val = readl_relaxed(timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
0056 val &= ~MLB_TMR_TMCSR_UF;
0057 writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
0058
0059 clk->event_handler(clk);
0060
0061 return IRQ_HANDLED;
0062 }
0063
0064 static void mlb_evt_timer_start(struct timer_of *to, bool periodic)
0065 {
0066 u32 val = MLB_TMR_TMCSR_CSL_DIV2;
0067
0068 val |= MLB_TMR_TMCSR_CNTE | MLB_TMR_TMCSR_TRG | MLB_TMR_TMCSR_INTE;
0069 if (periodic)
0070 val |= MLB_TMR_TMCSR_RELD;
0071 writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
0072 }
0073
0074 static void mlb_evt_timer_stop(struct timer_of *to)
0075 {
0076 u32 val = readl_relaxed(timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
0077
0078 val &= ~MLB_TMR_TMCSR_CNTE;
0079 writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
0080 }
0081
0082 static void mlb_evt_timer_register_count(struct timer_of *to, unsigned long cnt)
0083 {
0084 writel_relaxed(cnt, timer_of_base(to) + MLB_TMR_EVT_TMRLR1_OFS);
0085 }
0086
0087 static int mlb_set_state_periodic(struct clock_event_device *clk)
0088 {
0089 struct timer_of *to = to_timer_of(clk);
0090
0091 mlb_evt_timer_stop(to);
0092 mlb_evt_timer_register_count(to, to->of_clk.period);
0093 mlb_evt_timer_start(to, MLB_TIMER_PERIODIC);
0094 return 0;
0095 }
0096
0097 static int mlb_set_state_oneshot(struct clock_event_device *clk)
0098 {
0099 struct timer_of *to = to_timer_of(clk);
0100
0101 mlb_evt_timer_stop(to);
0102 mlb_evt_timer_start(to, MLB_TIMER_ONESHOT);
0103 return 0;
0104 }
0105
0106 static int mlb_set_state_shutdown(struct clock_event_device *clk)
0107 {
0108 struct timer_of *to = to_timer_of(clk);
0109
0110 mlb_evt_timer_stop(to);
0111 return 0;
0112 }
0113
0114 static int mlb_clkevt_next_event(unsigned long event,
0115 struct clock_event_device *clk)
0116 {
0117 struct timer_of *to = to_timer_of(clk);
0118
0119 mlb_evt_timer_stop(to);
0120 mlb_evt_timer_register_count(to, event);
0121 mlb_evt_timer_start(to, MLB_TIMER_ONESHOT);
0122 return 0;
0123 }
0124
0125 static int mlb_config_clock_source(struct timer_of *to)
0126 {
0127 u32 val = MLB_TMR_TMCSR_CSL_DIV2;
0128
0129 writel_relaxed(val, timer_of_base(to) + MLB_TMR_SRC_TMCSR_OFS);
0130 writel_relaxed(~0, timer_of_base(to) + MLB_TMR_SRC_TMRLR1_OFS);
0131 writel_relaxed(~0, timer_of_base(to) + MLB_TMR_SRC_TMRLR2_OFS);
0132 val |= MLB_TMR_TMCSR_RELD | MLB_TMR_TMCSR_CNTE | MLB_TMR_TMCSR_TRG;
0133 writel_relaxed(val, timer_of_base(to) + MLB_TMR_SRC_TMCSR_OFS);
0134 return 0;
0135 }
0136
0137 static int mlb_config_clock_event(struct timer_of *to)
0138 {
0139 writel_relaxed(0, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
0140 return 0;
0141 }
0142
0143 static struct timer_of to = {
0144 .flags = TIMER_OF_IRQ | TIMER_OF_BASE | TIMER_OF_CLOCK,
0145
0146 .clkevt = {
0147 .name = "mlb-clkevt",
0148 .rating = MLB_TIMER_RATING,
0149 .cpumask = cpu_possible_mask,
0150 .features = CLOCK_EVT_FEAT_DYNIRQ | CLOCK_EVT_FEAT_ONESHOT,
0151 .set_state_oneshot = mlb_set_state_oneshot,
0152 .set_state_periodic = mlb_set_state_periodic,
0153 .set_state_shutdown = mlb_set_state_shutdown,
0154 .set_next_event = mlb_clkevt_next_event,
0155 },
0156
0157 .of_irq = {
0158 .flags = IRQF_TIMER | IRQF_IRQPOLL,
0159 .handler = mlb_timer_interrupt,
0160 },
0161 };
0162
0163 static u64 notrace mlb_timer_sched_read(void)
0164 {
0165 return ~readl_relaxed(timer_of_base(&to) + MLB_TMR_SRC_TMR_OFS);
0166 }
0167
0168 static int __init mlb_timer_init(struct device_node *node)
0169 {
0170 int ret;
0171 unsigned long rate;
0172
0173 ret = timer_of_init(node, &to);
0174 if (ret)
0175 return ret;
0176
0177 rate = timer_of_rate(&to) / MLB_TMR_DIV_CNT;
0178 mlb_config_clock_source(&to);
0179 clocksource_mmio_init(timer_of_base(&to) + MLB_TMR_SRC_TMR_OFS,
0180 node->name, rate, MLB_TIMER_RATING, 32,
0181 clocksource_mmio_readl_down);
0182 sched_clock_register(mlb_timer_sched_read, 32, rate);
0183 mlb_config_clock_event(&to);
0184 clockevents_config_and_register(&to.clkevt, timer_of_rate(&to), 15,
0185 0xffffffff);
0186 return 0;
0187 }
0188 TIMER_OF_DECLARE(mlb_peritimer, "socionext,milbeaut-timer",
0189 mlb_timer_init);