drivers/clocksource/timer-fsl-ftm.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Freescale FlexTimer Module (FTM) timer driver.
0004  *
0005  * Copyright 2014 Freescale Semiconductor, Inc.
0006  */
0007
0008 #include <linux/clk.h>
0009 #include <linux/clockchips.h>
0010 #include <linux/clocksource.h>
0011 #include <linux/err.h>
0012 #include <linux/interrupt.h>
0013 #include <linux/io.h>
0014 #include <linux/of_address.h>
0015 #include <linux/of_irq.h>
0016 #include <linux/sched_clock.h>
0017 #include <linux/slab.h>
0018 #include <linux/fsl/ftm.h>
0019
0020 #define FTM_SC_CLK(c)   ((c) << FTM_SC_CLK_MASK_SHIFT)
0021
0022 struct ftm_clock_device {
0023     void __iomem *clksrc_base;
0024     void __iomem *clkevt_base;
0025     unsigned long periodic_cyc;
0026     unsigned long ps;
0027     bool big_endian;
0028 };
0029
0030 static struct ftm_clock_device *priv;
0031
0032 static inline u32 ftm_readl(void __iomem *addr)
0033 {
0034     if (priv->big_endian)
0035         return ioread32be(addr);
0036     else
0037         return ioread32(addr);
0038 }
0039
0040 static inline void ftm_writel(u32 val, void __iomem *addr)
0041 {
0042     if (priv->big_endian)
0043         iowrite32be(val, addr);
0044     else
0045         iowrite32(val, addr);
0046 }
0047
0048 static inline void ftm_counter_enable(void __iomem *base)
0049 {
0050     u32 val;
0051
0052     /* select and enable counter clock source */
0053     val = ftm_readl(base + FTM_SC);
0054     val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
0055     val |= priv->ps | FTM_SC_CLK(1);
0056     ftm_writel(val, base + FTM_SC);
0057 }
0058
0059 static inline void ftm_counter_disable(void __iomem *base)
0060 {
0061     u32 val;
0062
0063     /* disable counter clock source */
0064     val = ftm_readl(base + FTM_SC);
0065     val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
0066     ftm_writel(val, base + FTM_SC);
0067 }
0068
0069 static inline void ftm_irq_acknowledge(void __iomem *base)
0070 {
0071     u32 val;
0072
0073     val = ftm_readl(base + FTM_SC);
0074     val &= ~FTM_SC_TOF;
0075     ftm_writel(val, base + FTM_SC);
0076 }
0077
0078 static inline void ftm_irq_enable(void __iomem *base)
0079 {
0080     u32 val;
0081
0082     val = ftm_readl(base + FTM_SC);
0083     val |= FTM_SC_TOIE;
0084     ftm_writel(val, base + FTM_SC);
0085 }
0086
0087 static inline void ftm_irq_disable(void __iomem *base)
0088 {
0089     u32 val;
0090
0091     val = ftm_readl(base + FTM_SC);
0092     val &= ~FTM_SC_TOIE;
0093     ftm_writel(val, base + FTM_SC);
0094 }
0095
0096 static inline void ftm_reset_counter(void __iomem *base)
0097 {
0098     /*
0099      * The CNT register contains the FTM counter value.
0100      * Reset clears the CNT register. Writing any value to COUNT
0101      * updates the counter with its initial value, CNTIN.
0102      */
0103     ftm_writel(0x00, base + FTM_CNT);
0104 }
0105
0106 static u64 notrace ftm_read_sched_clock(void)
0107 {
0108     return ftm_readl(priv->clksrc_base + FTM_CNT);
0109 }
0110
0111 static int ftm_set_next_event(unsigned long delta,
0112                 struct clock_event_device *unused)
0113 {
0114     /*
0115      * The CNNIN and MOD are all double buffer registers, writing
0116      * to the MOD register latches the value into a buffer. The MOD
0117      * register is updated with the value of its write buffer with
0118      * the following scenario:
0119      * a, the counter source clock is disabled.
0120      */
0121     ftm_counter_disable(priv->clkevt_base);
0122
0123     /* Force the value of CNTIN to be loaded into the FTM counter */
0124     ftm_reset_counter(priv->clkevt_base);
0125
0126     /*
0127      * The counter increments until the value of MOD is reached,
0128      * at which point the counter is reloaded with the value of CNTIN.
0129      * The TOF (the overflow flag) bit is set when the FTM counter
0130      * changes from MOD to CNTIN. So we should using the delta - 1.
0131      */
0132     ftm_writel(delta - 1, priv->clkevt_base + FTM_MOD);
0133
0134     ftm_counter_enable(priv->clkevt_base);
0135
0136     ftm_irq_enable(priv->clkevt_base);
0137
0138     return 0;
0139 }
0140
0141 static int ftm_set_oneshot(struct clock_event_device *evt)
0142 {
0143     ftm_counter_disable(priv->clkevt_base);
0144     return 0;
0145 }
0146
0147 static int ftm_set_periodic(struct clock_event_device *evt)
0148 {
0149     ftm_set_next_event(priv->periodic_cyc, evt);
0150     return 0;
0151 }
0152
0153 static irqreturn_t ftm_evt_interrupt(int irq, void *dev_id)
0154 {
0155     struct clock_event_device *evt = dev_id;
0156
0157     ftm_irq_acknowledge(priv->clkevt_base);
0158
0159     if (likely(clockevent_state_oneshot(evt))) {
0160         ftm_irq_disable(priv->clkevt_base);
0161         ftm_counter_disable(priv->clkevt_base);
0162     }
0163
0164     evt->event_handler(evt);
0165
0166     return IRQ_HANDLED;
0167 }
0168
0169 static struct clock_event_device ftm_clockevent = {
0170     .name           = "Freescale ftm timer",
0171     .features       = CLOCK_EVT_FEAT_PERIODIC |
0172                   CLOCK_EVT_FEAT_ONESHOT,
0173     .set_state_periodic = ftm_set_periodic,
0174     .set_state_oneshot  = ftm_set_oneshot,
0175     .set_next_event     = ftm_set_next_event,
0176     .rating         = 300,
0177 };
0178
0179 static int __init ftm_clockevent_init(unsigned long freq, int irq)
0180 {
0181     int err;
0182
0183     ftm_writel(0x00, priv->clkevt_base + FTM_CNTIN);
0184     ftm_writel(~0u, priv->clkevt_base + FTM_MOD);
0185
0186     ftm_reset_counter(priv->clkevt_base);
0187
0188     err = request_irq(irq, ftm_evt_interrupt, IRQF_TIMER | IRQF_IRQPOLL,
0189               "Freescale ftm timer", &ftm_clockevent);
0190     if (err) {
0191         pr_err("ftm: setup irq failed: %d\n", err);
0192         return err;
0193     }
0194
0195     ftm_clockevent.cpumask = cpumask_of(0);
0196     ftm_clockevent.irq = irq;
0197
0198     clockevents_config_and_register(&ftm_clockevent,
0199                     freq / (1 << priv->ps),
0200                     1, 0xffff);
0201
0202     ftm_counter_enable(priv->clkevt_base);
0203
0204     return 0;
0205 }
0206
0207 static int __init ftm_clocksource_init(unsigned long freq)
0208 {
0209     int err;
0210
0211     ftm_writel(0x00, priv->clksrc_base + FTM_CNTIN);
0212     ftm_writel(~0u, priv->clksrc_base + FTM_MOD);
0213
0214     ftm_reset_counter(priv->clksrc_base);
0215
0216     sched_clock_register(ftm_read_sched_clock, 16, freq / (1 << priv->ps));
0217     err = clocksource_mmio_init(priv->clksrc_base + FTM_CNT, "fsl-ftm",
0218                     freq / (1 << priv->ps), 300, 16,
0219                     clocksource_mmio_readl_up);
0220     if (err) {
0221         pr_err("ftm: init clock source mmio failed: %d\n", err);
0222         return err;
0223     }
0224
0225     ftm_counter_enable(priv->clksrc_base);
0226
0227     return 0;
0228 }
0229
0230 static int __init __ftm_clk_init(struct device_node *np, char *cnt_name,
0231                  char *ftm_name)
0232 {
0233     struct clk *clk;
0234     int err;
0235
0236     clk = of_clk_get_by_name(np, cnt_name);
0237     if (IS_ERR(clk)) {
0238         pr_err("ftm: Cannot get \"%s\": %ld\n", cnt_name, PTR_ERR(clk));
0239         return PTR_ERR(clk);
0240     }
0241     err = clk_prepare_enable(clk);
0242     if (err) {
0243         pr_err("ftm: clock failed to prepare+enable \"%s\": %d\n",
0244             cnt_name, err);
0245         return err;
0246     }
0247
0248     clk = of_clk_get_by_name(np, ftm_name);
0249     if (IS_ERR(clk)) {
0250         pr_err("ftm: Cannot get \"%s\": %ld\n", ftm_name, PTR_ERR(clk));
0251         return PTR_ERR(clk);
0252     }
0253     err = clk_prepare_enable(clk);
0254     if (err)
0255         pr_err("ftm: clock failed to prepare+enable \"%s\": %d\n",
0256             ftm_name, err);
0257
0258     return clk_get_rate(clk);
0259 }
0260
0261 static unsigned long __init ftm_clk_init(struct device_node *np)
0262 {
0263     long freq;
0264
0265     freq = __ftm_clk_init(np, "ftm-evt-counter-en", "ftm-evt");
0266     if (freq <= 0)
0267         return 0;
0268
0269     freq = __ftm_clk_init(np, "ftm-src-counter-en", "ftm-src");
0270     if (freq <= 0)
0271         return 0;
0272
0273     return freq;
0274 }
0275
0276 static int __init ftm_calc_closest_round_cyc(unsigned long freq)
0277 {
0278     priv->ps = 0;
0279
0280     /* The counter register is only using the lower 16 bits, and
0281      * if the 'freq' value is to big here, then the periodic_cyc
0282      * may exceed 0xFFFF.
0283      */
0284     do {
0285         priv->periodic_cyc = DIV_ROUND_CLOSEST(freq,
0286                         HZ * (1 << priv->ps++));
0287     } while (priv->periodic_cyc > 0xFFFF);
0288
0289     if (priv->ps > FTM_PS_MAX) {
0290         pr_err("ftm: the prescaler is %lu > %d\n",
0291                 priv->ps, FTM_PS_MAX);
0292         return -EINVAL;
0293     }
0294
0295     return 0;
0296 }
0297
0298 static int __init ftm_timer_init(struct device_node *np)
0299 {
0300     unsigned long freq;
0301     int ret, irq;
0302
0303     priv = kzalloc(sizeof(*priv), GFP_KERNEL);
0304     if (!priv)
0305         return -ENOMEM;
0306
0307     ret = -ENXIO;
0308     priv->clkevt_base = of_iomap(np, 0);
0309     if (!priv->clkevt_base) {
0310         pr_err("ftm: unable to map event timer registers\n");
0311         goto err_clkevt;
0312     }
0313
0314     priv->clksrc_base = of_iomap(np, 1);
0315     if (!priv->clksrc_base) {
0316         pr_err("ftm: unable to map source timer registers\n");
0317         goto err_clksrc;
0318     }
0319
0320     ret = -EINVAL;
0321     irq = irq_of_parse_and_map(np, 0);
0322     if (irq <= 0) {
0323         pr_err("ftm: unable to get IRQ from DT, %d\n", irq);
0324         goto err;
0325     }
0326
0327     priv->big_endian = of_property_read_bool(np, "big-endian");
0328
0329     freq = ftm_clk_init(np);
0330     if (!freq)
0331         goto err;
0332
0333     ret = ftm_calc_closest_round_cyc(freq);
0334     if (ret)
0335         goto err;
0336
0337     ret = ftm_clocksource_init(freq);
0338     if (ret)
0339         goto err;
0340
0341     ret = ftm_clockevent_init(freq, irq);
0342     if (ret)
0343         goto err;
0344
0345     return 0;
0346
0347 err:
0348     iounmap(priv->clksrc_base);
0349 err_clksrc:
0350     iounmap(priv->clkevt_base);
0351 err_clkevt:
0352     kfree(priv);
0353     return ret;
0354 }
0355 TIMER_OF_DECLARE(flextimer, "fsl,ftm-timer", ftm_timer_init);