drivers/clocksource/i8253.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * i8253 PIT clocksource
0004  */
0005 #include <linux/clockchips.h>
0006 #include <linux/init.h>
0007 #include <linux/io.h>
0008 #include <linux/spinlock.h>
0009 #include <linux/timex.h>
0010 #include <linux/module.h>
0011 #include <linux/i8253.h>
0012 #include <linux/smp.h>
0013
0014 /*
0015  * Protects access to I/O ports
0016  *
0017  * 0040-0043 : timer0, i8253 / i8254
0018  * 0061-0061 : NMI Control Register which contains two speaker control bits.
0019  */
0020 DEFINE_RAW_SPINLOCK(i8253_lock);
0021 EXPORT_SYMBOL(i8253_lock);
0022
0023 /*
0024  * Handle PIT quirk in pit_shutdown() where zeroing the counter register
0025  * restarts the PIT, negating the shutdown. On platforms with the quirk,
0026  * platform specific code can set this to false.
0027  */
0028 bool i8253_clear_counter_on_shutdown __ro_after_init = true;
0029
0030 #ifdef CONFIG_CLKSRC_I8253
0031 /*
0032  * Since the PIT overflows every tick, its not very useful
0033  * to just read by itself. So use jiffies to emulate a free
0034  * running counter:
0035  */
0036 static u64 i8253_read(struct clocksource *cs)
0037 {
0038     static int old_count;
0039     static u32 old_jifs;
0040     unsigned long flags;
0041     int count;
0042     u32 jifs;
0043
0044     raw_spin_lock_irqsave(&i8253_lock, flags);
0045     /*
0046      * Although our caller may have the read side of jiffies_lock,
0047      * this is now a seqlock, and we are cheating in this routine
0048      * by having side effects on state that we cannot undo if
0049      * there is a collision on the seqlock and our caller has to
0050      * retry.  (Namely, old_jifs and old_count.)  So we must treat
0051      * jiffies as volatile despite the lock.  We read jiffies
0052      * before latching the timer count to guarantee that although
0053      * the jiffies value might be older than the count (that is,
0054      * the counter may underflow between the last point where
0055      * jiffies was incremented and the point where we latch the
0056      * count), it cannot be newer.
0057      */
0058     jifs = jiffies;
0059     outb_p(0x00, PIT_MODE); /* latch the count ASAP */
0060     count = inb_p(PIT_CH0); /* read the latched count */
0061     count |= inb_p(PIT_CH0) << 8;
0062
0063     /* VIA686a test code... reset the latch if count > max + 1 */
0064     if (count > PIT_LATCH) {
0065         outb_p(0x34, PIT_MODE);
0066         outb_p(PIT_LATCH & 0xff, PIT_CH0);
0067         outb_p(PIT_LATCH >> 8, PIT_CH0);
0068         count = PIT_LATCH - 1;
0069     }
0070
0071     /*
0072      * It's possible for count to appear to go the wrong way for a
0073      * couple of reasons:
0074      *
0075      *  1. The timer counter underflows, but we haven't handled the
0076      *     resulting interrupt and incremented jiffies yet.
0077      *  2. Hardware problem with the timer, not giving us continuous time,
0078      *     the counter does small "jumps" upwards on some Pentium systems,
0079      *     (see c't 95/10 page 335 for Neptun bug.)
0080      *
0081      * Previous attempts to handle these cases intelligently were
0082      * buggy, so we just do the simple thing now.
0083      */
0084     if (count > old_count && jifs == old_jifs)
0085         count = old_count;
0086
0087     old_count = count;
0088     old_jifs = jifs;
0089
0090     raw_spin_unlock_irqrestore(&i8253_lock, flags);
0091
0092     count = (PIT_LATCH - 1) - count;
0093
0094     return (u64)(jifs * PIT_LATCH) + count;
0095 }
0096
0097 static struct clocksource i8253_cs = {
0098     .name       = "pit",
0099     .rating     = 110,
0100     .read       = i8253_read,
0101     .mask       = CLOCKSOURCE_MASK(32),
0102 };
0103
0104 int __init clocksource_i8253_init(void)
0105 {
0106     return clocksource_register_hz(&i8253_cs, PIT_TICK_RATE);
0107 }
0108 #endif
0109
0110 #ifdef CONFIG_CLKEVT_I8253
0111 static int pit_shutdown(struct clock_event_device *evt)
0112 {
0113     if (!clockevent_state_oneshot(evt) && !clockevent_state_periodic(evt))
0114         return 0;
0115
0116     raw_spin_lock(&i8253_lock);
0117
0118     outb_p(0x30, PIT_MODE);
0119
0120     if (i8253_clear_counter_on_shutdown) {
0121         outb_p(0, PIT_CH0);
0122         outb_p(0, PIT_CH0);
0123     }
0124
0125     raw_spin_unlock(&i8253_lock);
0126     return 0;
0127 }
0128
0129 static int pit_set_oneshot(struct clock_event_device *evt)
0130 {
0131     raw_spin_lock(&i8253_lock);
0132     outb_p(0x38, PIT_MODE);
0133     raw_spin_unlock(&i8253_lock);
0134     return 0;
0135 }
0136
0137 static int pit_set_periodic(struct clock_event_device *evt)
0138 {
0139     raw_spin_lock(&i8253_lock);
0140
0141     /* binary, mode 2, LSB/MSB, ch 0 */
0142     outb_p(0x34, PIT_MODE);
0143     outb_p(PIT_LATCH & 0xff, PIT_CH0);  /* LSB */
0144     outb_p(PIT_LATCH >> 8, PIT_CH0);    /* MSB */
0145
0146     raw_spin_unlock(&i8253_lock);
0147     return 0;
0148 }
0149
0150 /*
0151  * Program the next event in oneshot mode
0152  *
0153  * Delta is given in PIT ticks
0154  */
0155 static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
0156 {
0157     raw_spin_lock(&i8253_lock);
0158     outb_p(delta & 0xff , PIT_CH0); /* LSB */
0159     outb_p(delta >> 8 , PIT_CH0);       /* MSB */
0160     raw_spin_unlock(&i8253_lock);
0161
0162     return 0;
0163 }
0164
0165 /*
0166  * On UP the PIT can serve all of the possible timer functions. On SMP systems
0167  * it can be solely used for the global tick.
0168  */
0169 struct clock_event_device i8253_clockevent = {
0170     .name           = "pit",
0171     .features       = CLOCK_EVT_FEAT_PERIODIC,
0172     .set_state_shutdown = pit_shutdown,
0173     .set_state_periodic = pit_set_periodic,
0174     .set_next_event     = pit_next_event,
0175 };
0176
0177 /*
0178  * Initialize the conversion factor and the min/max deltas of the clock event
0179  * structure and register the clock event source with the framework.
0180  */
0181 void __init clockevent_i8253_init(bool oneshot)
0182 {
0183     if (oneshot) {
0184         i8253_clockevent.features |= CLOCK_EVT_FEAT_ONESHOT;
0185         i8253_clockevent.set_state_oneshot = pit_set_oneshot;
0186     }
0187     /*
0188      * Start pit with the boot cpu mask. x86 might make it global
0189      * when it is used as broadcast device later.
0190      */
0191     i8253_clockevent.cpumask = cpumask_of(smp_processor_id());
0192
0193     clockevents_config_and_register(&i8253_clockevent, PIT_TICK_RATE,
0194                     0xF, 0x7FFF);
0195 }
0196 #endif