drivers/clocksource/em_sti.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Emma Mobile Timer Support - STI
0004  *
0005  *  Copyright (C) 2012 Magnus Damm
0006  */
0007
0008 #include <linux/init.h>
0009 #include <linux/platform_device.h>
0010 #include <linux/spinlock.h>
0011 #include <linux/interrupt.h>
0012 #include <linux/ioport.h>
0013 #include <linux/io.h>
0014 #include <linux/clk.h>
0015 #include <linux/irq.h>
0016 #include <linux/err.h>
0017 #include <linux/delay.h>
0018 #include <linux/clocksource.h>
0019 #include <linux/clockchips.h>
0020 #include <linux/slab.h>
0021 #include <linux/module.h>
0022
0023 enum { USER_CLOCKSOURCE, USER_CLOCKEVENT, USER_NR };
0024
0025 struct em_sti_priv {
0026     void __iomem *base;
0027     struct clk *clk;
0028     struct platform_device *pdev;
0029     unsigned int active[USER_NR];
0030     unsigned long rate;
0031     raw_spinlock_t lock;
0032     struct clock_event_device ced;
0033     struct clocksource cs;
0034 };
0035
0036 #define STI_CONTROL 0x00
0037 #define STI_COMPA_H 0x10
0038 #define STI_COMPA_L 0x14
0039 #define STI_COMPB_H 0x18
0040 #define STI_COMPB_L 0x1c
0041 #define STI_COUNT_H 0x20
0042 #define STI_COUNT_L 0x24
0043 #define STI_COUNT_RAW_H 0x28
0044 #define STI_COUNT_RAW_L 0x2c
0045 #define STI_SET_H 0x30
0046 #define STI_SET_L 0x34
0047 #define STI_INTSTATUS 0x40
0048 #define STI_INTRAWSTATUS 0x44
0049 #define STI_INTENSET 0x48
0050 #define STI_INTENCLR 0x4c
0051 #define STI_INTFFCLR 0x50
0052
0053 static inline unsigned long em_sti_read(struct em_sti_priv *p, int offs)
0054 {
0055     return ioread32(p->base + offs);
0056 }
0057
0058 static inline void em_sti_write(struct em_sti_priv *p, int offs,
0059                 unsigned long value)
0060 {
0061     iowrite32(value, p->base + offs);
0062 }
0063
0064 static int em_sti_enable(struct em_sti_priv *p)
0065 {
0066     int ret;
0067
0068     /* enable clock */
0069     ret = clk_enable(p->clk);
0070     if (ret) {
0071         dev_err(&p->pdev->dev, "cannot enable clock\n");
0072         return ret;
0073     }
0074
0075     /* reset the counter */
0076     em_sti_write(p, STI_SET_H, 0x40000000);
0077     em_sti_write(p, STI_SET_L, 0x00000000);
0078
0079     /* mask and clear pending interrupts */
0080     em_sti_write(p, STI_INTENCLR, 3);
0081     em_sti_write(p, STI_INTFFCLR, 3);
0082
0083     /* enable updates of counter registers */
0084     em_sti_write(p, STI_CONTROL, 1);
0085
0086     return 0;
0087 }
0088
0089 static void em_sti_disable(struct em_sti_priv *p)
0090 {
0091     /* mask interrupts */
0092     em_sti_write(p, STI_INTENCLR, 3);
0093
0094     /* stop clock */
0095     clk_disable(p->clk);
0096 }
0097
0098 static u64 em_sti_count(struct em_sti_priv *p)
0099 {
0100     u64 ticks;
0101     unsigned long flags;
0102
0103     /* the STI hardware buffers the 48-bit count, but to
0104      * break it out into two 32-bit access the registers
0105      * must be accessed in a certain order.
0106      * Always read STI_COUNT_H before STI_COUNT_L.
0107      */
0108     raw_spin_lock_irqsave(&p->lock, flags);
0109     ticks = (u64)(em_sti_read(p, STI_COUNT_H) & 0xffff) << 32;
0110     ticks |= em_sti_read(p, STI_COUNT_L);
0111     raw_spin_unlock_irqrestore(&p->lock, flags);
0112
0113     return ticks;
0114 }
0115
0116 static u64 em_sti_set_next(struct em_sti_priv *p, u64 next)
0117 {
0118     unsigned long flags;
0119
0120     raw_spin_lock_irqsave(&p->lock, flags);
0121
0122     /* mask compare A interrupt */
0123     em_sti_write(p, STI_INTENCLR, 1);
0124
0125     /* update compare A value */
0126     em_sti_write(p, STI_COMPA_H, next >> 32);
0127     em_sti_write(p, STI_COMPA_L, next & 0xffffffff);
0128
0129     /* clear compare A interrupt source */
0130     em_sti_write(p, STI_INTFFCLR, 1);
0131
0132     /* unmask compare A interrupt */
0133     em_sti_write(p, STI_INTENSET, 1);
0134
0135     raw_spin_unlock_irqrestore(&p->lock, flags);
0136
0137     return next;
0138 }
0139
0140 static irqreturn_t em_sti_interrupt(int irq, void *dev_id)
0141 {
0142     struct em_sti_priv *p = dev_id;
0143
0144     p->ced.event_handler(&p->ced);
0145     return IRQ_HANDLED;
0146 }
0147
0148 static int em_sti_start(struct em_sti_priv *p, unsigned int user)
0149 {
0150     unsigned long flags;
0151     int used_before;
0152     int ret = 0;
0153
0154     raw_spin_lock_irqsave(&p->lock, flags);
0155     used_before = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
0156     if (!used_before)
0157         ret = em_sti_enable(p);
0158
0159     if (!ret)
0160         p->active[user] = 1;
0161     raw_spin_unlock_irqrestore(&p->lock, flags);
0162
0163     return ret;
0164 }
0165
0166 static void em_sti_stop(struct em_sti_priv *p, unsigned int user)
0167 {
0168     unsigned long flags;
0169     int used_before, used_after;
0170
0171     raw_spin_lock_irqsave(&p->lock, flags);
0172     used_before = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
0173     p->active[user] = 0;
0174     used_after = p->active[USER_CLOCKSOURCE] | p->active[USER_CLOCKEVENT];
0175
0176     if (used_before && !used_after)
0177         em_sti_disable(p);
0178     raw_spin_unlock_irqrestore(&p->lock, flags);
0179 }
0180
0181 static struct em_sti_priv *cs_to_em_sti(struct clocksource *cs)
0182 {
0183     return container_of(cs, struct em_sti_priv, cs);
0184 }
0185
0186 static u64 em_sti_clocksource_read(struct clocksource *cs)
0187 {
0188     return em_sti_count(cs_to_em_sti(cs));
0189 }
0190
0191 static int em_sti_clocksource_enable(struct clocksource *cs)
0192 {
0193     struct em_sti_priv *p = cs_to_em_sti(cs);
0194
0195     return em_sti_start(p, USER_CLOCKSOURCE);
0196 }
0197
0198 static void em_sti_clocksource_disable(struct clocksource *cs)
0199 {
0200     em_sti_stop(cs_to_em_sti(cs), USER_CLOCKSOURCE);
0201 }
0202
0203 static void em_sti_clocksource_resume(struct clocksource *cs)
0204 {
0205     em_sti_clocksource_enable(cs);
0206 }
0207
0208 static int em_sti_register_clocksource(struct em_sti_priv *p)
0209 {
0210     struct clocksource *cs = &p->cs;
0211
0212     cs->name = dev_name(&p->pdev->dev);
0213     cs->rating = 200;
0214     cs->read = em_sti_clocksource_read;
0215     cs->enable = em_sti_clocksource_enable;
0216     cs->disable = em_sti_clocksource_disable;
0217     cs->suspend = em_sti_clocksource_disable;
0218     cs->resume = em_sti_clocksource_resume;
0219     cs->mask = CLOCKSOURCE_MASK(48);
0220     cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
0221
0222     dev_info(&p->pdev->dev, "used as clock source\n");
0223
0224     clocksource_register_hz(cs, p->rate);
0225     return 0;
0226 }
0227
0228 static struct em_sti_priv *ced_to_em_sti(struct clock_event_device *ced)
0229 {
0230     return container_of(ced, struct em_sti_priv, ced);
0231 }
0232
0233 static int em_sti_clock_event_shutdown(struct clock_event_device *ced)
0234 {
0235     struct em_sti_priv *p = ced_to_em_sti(ced);
0236     em_sti_stop(p, USER_CLOCKEVENT);
0237     return 0;
0238 }
0239
0240 static int em_sti_clock_event_set_oneshot(struct clock_event_device *ced)
0241 {
0242     struct em_sti_priv *p = ced_to_em_sti(ced);
0243
0244     dev_info(&p->pdev->dev, "used for oneshot clock events\n");
0245     em_sti_start(p, USER_CLOCKEVENT);
0246     return 0;
0247 }
0248
0249 static int em_sti_clock_event_next(unsigned long delta,
0250                    struct clock_event_device *ced)
0251 {
0252     struct em_sti_priv *p = ced_to_em_sti(ced);
0253     u64 next;
0254     int safe;
0255
0256     next = em_sti_set_next(p, em_sti_count(p) + delta);
0257     safe = em_sti_count(p) < (next - 1);
0258
0259     return !safe;
0260 }
0261
0262 static void em_sti_register_clockevent(struct em_sti_priv *p)
0263 {
0264     struct clock_event_device *ced = &p->ced;
0265
0266     ced->name = dev_name(&p->pdev->dev);
0267     ced->features = CLOCK_EVT_FEAT_ONESHOT;
0268     ced->rating = 200;
0269     ced->cpumask = cpu_possible_mask;
0270     ced->set_next_event = em_sti_clock_event_next;
0271     ced->set_state_shutdown = em_sti_clock_event_shutdown;
0272     ced->set_state_oneshot = em_sti_clock_event_set_oneshot;
0273
0274     dev_info(&p->pdev->dev, "used for clock events\n");
0275
0276     clockevents_config_and_register(ced, p->rate, 2, 0xffffffff);
0277 }
0278
0279 static int em_sti_probe(struct platform_device *pdev)
0280 {
0281     struct em_sti_priv *p;
0282     int irq, ret;
0283
0284     p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
0285     if (p == NULL)
0286         return -ENOMEM;
0287
0288     p->pdev = pdev;
0289     platform_set_drvdata(pdev, p);
0290
0291     irq = platform_get_irq(pdev, 0);
0292     if (irq < 0)
0293         return irq;
0294
0295     /* map memory, let base point to the STI instance */
0296     p->base = devm_platform_ioremap_resource(pdev, 0);
0297     if (IS_ERR(p->base))
0298         return PTR_ERR(p->base);
0299
0300     ret = devm_request_irq(&pdev->dev, irq, em_sti_interrupt,
0301                    IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
0302                    dev_name(&pdev->dev), p);
0303     if (ret) {
0304         dev_err(&pdev->dev, "failed to request low IRQ\n");
0305         return ret;
0306     }
0307
0308     /* get hold of clock */
0309     p->clk = devm_clk_get(&pdev->dev, "sclk");
0310     if (IS_ERR(p->clk)) {
0311         dev_err(&pdev->dev, "cannot get clock\n");
0312         return PTR_ERR(p->clk);
0313     }
0314
0315     ret = clk_prepare(p->clk);
0316     if (ret < 0) {
0317         dev_err(&pdev->dev, "cannot prepare clock\n");
0318         return ret;
0319     }
0320
0321     ret = clk_enable(p->clk);
0322     if (ret < 0) {
0323         dev_err(&p->pdev->dev, "cannot enable clock\n");
0324         clk_unprepare(p->clk);
0325         return ret;
0326     }
0327     p->rate = clk_get_rate(p->clk);
0328     clk_disable(p->clk);
0329
0330     raw_spin_lock_init(&p->lock);
0331     em_sti_register_clockevent(p);
0332     em_sti_register_clocksource(p);
0333     return 0;
0334 }
0335
0336 static int em_sti_remove(struct platform_device *pdev)
0337 {
0338     return -EBUSY; /* cannot unregister clockevent and clocksource */
0339 }
0340
0341 static const struct of_device_id em_sti_dt_ids[] = {
0342     { .compatible = "renesas,em-sti", },
0343     {},
0344 };
0345 MODULE_DEVICE_TABLE(of, em_sti_dt_ids);
0346
0347 static struct platform_driver em_sti_device_driver = {
0348     .probe      = em_sti_probe,
0349     .remove     = em_sti_remove,
0350     .driver     = {
0351         .name   = "em_sti",
0352         .of_match_table = em_sti_dt_ids,
0353     }
0354 };
0355
0356 static int __init em_sti_init(void)
0357 {
0358     return platform_driver_register(&em_sti_device_driver);
0359 }
0360
0361 static void __exit em_sti_exit(void)
0362 {
0363     platform_driver_unregister(&em_sti_device_driver);
0364 }
0365
0366 subsys_initcall(em_sti_init);
0367 module_exit(em_sti_exit);
0368
0369 MODULE_AUTHOR("Magnus Damm");
0370 MODULE_DESCRIPTION("Renesas Emma Mobile STI Timer Driver");
0371 MODULE_LICENSE("GPL v2");