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0001 # SPDX-License-Identifier: GPL-2.0 0002 # Zynq Ultrascale+ MPSoC clock specific Makefile 0003 0004 obj-$(CONFIG_ARCH_ZYNQMP) += pll.o clk-gate-zynqmp.o divider.o clk-mux-zynqmp.o clkc.o
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