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0007 #include <linux/clkdev.h>
0008 #include <linux/clk-provider.h>
0009 #include <linux/err.h>
0010 #include <linux/module.h>
0011 #include <linux/of.h>
0012 #include <linux/platform_device.h>
0013 #include <linux/slab.h>
0014 #include <linux/vexpress.h>
0015
0016 struct vexpress_osc {
0017 struct regmap *reg;
0018 struct clk_hw hw;
0019 unsigned long rate_min;
0020 unsigned long rate_max;
0021 };
0022
0023 #define to_vexpress_osc(osc) container_of(osc, struct vexpress_osc, hw)
0024
0025 static unsigned long vexpress_osc_recalc_rate(struct clk_hw *hw,
0026 unsigned long parent_rate)
0027 {
0028 struct vexpress_osc *osc = to_vexpress_osc(hw);
0029 u32 rate;
0030
0031 regmap_read(osc->reg, 0, &rate);
0032
0033 return rate;
0034 }
0035
0036 static long vexpress_osc_round_rate(struct clk_hw *hw, unsigned long rate,
0037 unsigned long *parent_rate)
0038 {
0039 struct vexpress_osc *osc = to_vexpress_osc(hw);
0040
0041 if (osc->rate_min && rate < osc->rate_min)
0042 rate = osc->rate_min;
0043
0044 if (osc->rate_max && rate > osc->rate_max)
0045 rate = osc->rate_max;
0046
0047 return rate;
0048 }
0049
0050 static int vexpress_osc_set_rate(struct clk_hw *hw, unsigned long rate,
0051 unsigned long parent_rate)
0052 {
0053 struct vexpress_osc *osc = to_vexpress_osc(hw);
0054
0055 return regmap_write(osc->reg, 0, rate);
0056 }
0057
0058 static const struct clk_ops vexpress_osc_ops = {
0059 .recalc_rate = vexpress_osc_recalc_rate,
0060 .round_rate = vexpress_osc_round_rate,
0061 .set_rate = vexpress_osc_set_rate,
0062 };
0063
0064
0065 static int vexpress_osc_probe(struct platform_device *pdev)
0066 {
0067 struct clk_init_data init;
0068 struct vexpress_osc *osc;
0069 u32 range[2];
0070 int ret;
0071
0072 osc = devm_kzalloc(&pdev->dev, sizeof(*osc), GFP_KERNEL);
0073 if (!osc)
0074 return -ENOMEM;
0075
0076 osc->reg = devm_regmap_init_vexpress_config(&pdev->dev);
0077 if (IS_ERR(osc->reg))
0078 return PTR_ERR(osc->reg);
0079
0080 if (of_property_read_u32_array(pdev->dev.of_node, "freq-range", range,
0081 ARRAY_SIZE(range)) == 0) {
0082 osc->rate_min = range[0];
0083 osc->rate_max = range[1];
0084 }
0085
0086 if (of_property_read_string(pdev->dev.of_node, "clock-output-names",
0087 &init.name) != 0)
0088 init.name = dev_name(&pdev->dev);
0089
0090 init.ops = &vexpress_osc_ops;
0091 init.flags = 0;
0092 init.num_parents = 0;
0093
0094 osc->hw.init = &init;
0095
0096 ret = devm_clk_hw_register(&pdev->dev, &osc->hw);
0097 if (ret < 0)
0098 return ret;
0099
0100 devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_simple_get, &osc->hw);
0101 clk_hw_set_rate_range(&osc->hw, osc->rate_min, osc->rate_max);
0102
0103 dev_dbg(&pdev->dev, "Registered clock '%s'\n", init.name);
0104
0105 return 0;
0106 }
0107
0108 static const struct of_device_id vexpress_osc_of_match[] = {
0109 { .compatible = "arm,vexpress-osc", },
0110 {}
0111 };
0112 MODULE_DEVICE_TABLE(of, vexpress_osc_of_match);
0113
0114 static struct platform_driver vexpress_osc_driver = {
0115 .driver = {
0116 .name = "vexpress-osc",
0117 .of_match_table = vexpress_osc_of_match,
0118 },
0119 .probe = vexpress_osc_probe,
0120 };
0121 module_platform_driver(vexpress_osc_driver);
0122 MODULE_LICENSE("GPL v2");