clk/ux500/reset-prcc.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002
0003 #ifndef __RESET_PRCC_H
0004 #define __RESET_PRCC_H
0005
0006 #include <linux/reset-controller.h>
0007 #include <linux/io.h>
0008
0009 /**
0010  * struct u8500_prcc_reset - U8500 PRCC reset controller state
0011  * @rcdev: reset controller device
0012  * @phy_base: the physical base address for each PRCC block
0013  * @base: the remapped PRCC bases
0014  */
0015 struct u8500_prcc_reset {
0016     struct reset_controller_dev rcdev;
0017     u32 phy_base[CLKRST_MAX];
0018     void __iomem *base[CLKRST_MAX];
0019 };
0020
0021 void u8500_prcc_reset_init(struct device_node *np, struct u8500_prcc_reset *ur);
0022
0023 #endif