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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (C) 2016 Socionext Inc.
0004  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
0005  */
0006 
0007 #include <linux/clk-provider.h>
0008 #include <linux/device.h>
0009 #include <linux/regmap.h>
0010 
0011 #include "clk-uniphier.h"
0012 
0013 struct uniphier_clk_gate {
0014     struct clk_hw hw;
0015     struct regmap *regmap;
0016     unsigned int reg;
0017     unsigned int bit;
0018 };
0019 
0020 #define to_uniphier_clk_gate(_hw) \
0021                 container_of(_hw, struct uniphier_clk_gate, hw)
0022 
0023 static int uniphier_clk_gate_endisable(struct clk_hw *hw, int enable)
0024 {
0025     struct uniphier_clk_gate *gate = to_uniphier_clk_gate(hw);
0026 
0027     return regmap_write_bits(gate->regmap, gate->reg, BIT(gate->bit),
0028                  enable ? BIT(gate->bit) : 0);
0029 }
0030 
0031 static int uniphier_clk_gate_enable(struct clk_hw *hw)
0032 {
0033     return uniphier_clk_gate_endisable(hw, 1);
0034 }
0035 
0036 static void uniphier_clk_gate_disable(struct clk_hw *hw)
0037 {
0038     if (uniphier_clk_gate_endisable(hw, 0) < 0)
0039         pr_warn("failed to disable clk\n");
0040 }
0041 
0042 static int uniphier_clk_gate_is_enabled(struct clk_hw *hw)
0043 {
0044     struct uniphier_clk_gate *gate = to_uniphier_clk_gate(hw);
0045     unsigned int val;
0046 
0047     if (regmap_read(gate->regmap, gate->reg, &val) < 0)
0048         pr_warn("is_enabled() may return wrong result\n");
0049 
0050     return !!(val & BIT(gate->bit));
0051 }
0052 
0053 static const struct clk_ops uniphier_clk_gate_ops = {
0054     .enable = uniphier_clk_gate_enable,
0055     .disable = uniphier_clk_gate_disable,
0056     .is_enabled = uniphier_clk_gate_is_enabled,
0057 };
0058 
0059 struct clk_hw *uniphier_clk_register_gate(struct device *dev,
0060                       struct regmap *regmap,
0061                       const char *name,
0062                 const struct uniphier_clk_gate_data *data)
0063 {
0064     struct uniphier_clk_gate *gate;
0065     struct clk_init_data init;
0066     int ret;
0067 
0068     gate = devm_kzalloc(dev, sizeof(*gate), GFP_KERNEL);
0069     if (!gate)
0070         return ERR_PTR(-ENOMEM);
0071 
0072     init.name = name;
0073     init.ops = &uniphier_clk_gate_ops;
0074     init.flags = data->parent_name ? CLK_SET_RATE_PARENT : 0;
0075     init.parent_names = data->parent_name ? &data->parent_name : NULL;
0076     init.num_parents = data->parent_name ? 1 : 0;
0077 
0078     gate->regmap = regmap;
0079     gate->reg = data->reg;
0080     gate->bit = data->bit;
0081     gate->hw.init = &init;
0082 
0083     ret = devm_clk_hw_register(dev, &gate->hw);
0084     if (ret)
0085         return ERR_PTR(ret);
0086 
0087     return &gate->hw;
0088 }