clk/ti/interface.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * OMAP interface clock support
0004  *
0005  * Copyright (C) 2013 Texas Instruments, Inc.
0006  *
0007  * Tero Kristo <t-kristo@ti.com>
0008  */
0009
0010 #include <linux/clk-provider.h>
0011 #include <linux/slab.h>
0012 #include <linux/of.h>
0013 #include <linux/of_address.h>
0014 #include <linux/clk/ti.h>
0015 #include "clock.h"
0016
0017 #undef pr_fmt
0018 #define pr_fmt(fmt) "%s: " fmt, __func__
0019
0020 static const struct clk_ops ti_interface_clk_ops = {
0021     .init       = &omap2_init_clk_clkdm,
0022     .enable     = &omap2_dflt_clk_enable,
0023     .disable    = &omap2_dflt_clk_disable,
0024     .is_enabled = &omap2_dflt_clk_is_enabled,
0025 };
0026
0027 static struct clk *_register_interface(struct device *dev, const char *name,
0028                        const char *parent_name,
0029                        struct clk_omap_reg *reg, u8 bit_idx,
0030                        const struct clk_hw_omap_ops *ops)
0031 {
0032     struct clk_init_data init = { NULL };
0033     struct clk_hw_omap *clk_hw;
0034     struct clk *clk;
0035
0036     clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
0037     if (!clk_hw)
0038         return ERR_PTR(-ENOMEM);
0039
0040     clk_hw->hw.init = &init;
0041     clk_hw->ops = ops;
0042     memcpy(&clk_hw->enable_reg, reg, sizeof(*reg));
0043     clk_hw->enable_bit = bit_idx;
0044
0045     init.name = name;
0046     init.ops = &ti_interface_clk_ops;
0047     init.flags = 0;
0048
0049     init.num_parents = 1;
0050     init.parent_names = &parent_name;
0051
0052     clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name);
0053
0054     if (IS_ERR(clk))
0055         kfree(clk_hw);
0056
0057     return clk;
0058 }
0059
0060 static void __init _of_ti_interface_clk_setup(struct device_node *node,
0061                           const struct clk_hw_omap_ops *ops)
0062 {
0063     struct clk *clk;
0064     const char *parent_name;
0065     struct clk_omap_reg reg;
0066     u8 enable_bit = 0;
0067     const char *name;
0068     u32 val;
0069
0070     if (ti_clk_get_reg_addr(node, 0, &reg))
0071         return;
0072
0073     if (!of_property_read_u32(node, "ti,bit-shift", &val))
0074         enable_bit = val;
0075
0076     parent_name = of_clk_get_parent_name(node, 0);
0077     if (!parent_name) {
0078         pr_err("%pOFn must have a parent\n", node);
0079         return;
0080     }
0081
0082     name = ti_dt_clk_name(node);
0083     clk = _register_interface(NULL, name, parent_name, &reg,
0084                   enable_bit, ops);
0085
0086     if (!IS_ERR(clk))
0087         of_clk_add_provider(node, of_clk_src_simple_get, clk);
0088 }
0089
0090 static void __init of_ti_interface_clk_setup(struct device_node *node)
0091 {
0092     _of_ti_interface_clk_setup(node, &clkhwops_iclk_wait);
0093 }
0094 CLK_OF_DECLARE(ti_interface_clk, "ti,omap3-interface-clock",
0095            of_ti_interface_clk_setup);
0096
0097 static void __init of_ti_no_wait_interface_clk_setup(struct device_node *node)
0098 {
0099     _of_ti_interface_clk_setup(node, &clkhwops_iclk);
0100 }
0101 CLK_OF_DECLARE(ti_no_wait_interface_clk, "ti,omap3-no-wait-interface-clock",
0102            of_ti_no_wait_interface_clk_setup);
0103
0104 #ifdef CONFIG_ARCH_OMAP3
0105 static void __init of_ti_hsotgusb_interface_clk_setup(struct device_node *node)
0106 {
0107     _of_ti_interface_clk_setup(node,
0108                    &clkhwops_omap3430es2_iclk_hsotgusb_wait);
0109 }
0110 CLK_OF_DECLARE(ti_hsotgusb_interface_clk, "ti,omap3-hsotgusb-interface-clock",
0111            of_ti_hsotgusb_interface_clk_setup);
0112
0113 static void __init of_ti_dss_interface_clk_setup(struct device_node *node)
0114 {
0115     _of_ti_interface_clk_setup(node,
0116                    &clkhwops_omap3430es2_iclk_dss_usbhost_wait);
0117 }
0118 CLK_OF_DECLARE(ti_dss_interface_clk, "ti,omap3-dss-interface-clock",
0119            of_ti_dss_interface_clk_setup);
0120
0121 static void __init of_ti_ssi_interface_clk_setup(struct device_node *node)
0122 {
0123     _of_ti_interface_clk_setup(node, &clkhwops_omap3430es2_iclk_ssi_wait);
0124 }
0125 CLK_OF_DECLARE(ti_ssi_interface_clk, "ti,omap3-ssi-interface-clock",
0126            of_ti_ssi_interface_clk_setup);
0127
0128 static void __init of_ti_am35xx_interface_clk_setup(struct device_node *node)
0129 {
0130     _of_ti_interface_clk_setup(node, &clkhwops_am35xx_ipss_wait);
0131 }
0132 CLK_OF_DECLARE(ti_am35xx_interface_clk, "ti,am35xx-interface-clock",
0133            of_ti_am35xx_interface_clk_setup);
0134 #endif
0135
0136 #ifdef CONFIG_SOC_OMAP2430
0137 static void __init of_ti_omap2430_interface_clk_setup(struct device_node *node)
0138 {
0139     _of_ti_interface_clk_setup(node, &clkhwops_omap2430_i2chs_wait);
0140 }
0141 CLK_OF_DECLARE(ti_omap2430_interface_clk, "ti,omap2430-interface-clock",
0142            of_ti_omap2430_interface_clk_setup);
0143 #endif