clk/ti/clk-2xxx.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * OMAP2 Clock init
0004  *
0005  * Copyright (C) 2013 Texas Instruments, Inc
0006  *     Tero Kristo (t-kristo@ti.com)
0007  */
0008
0009 #include <linux/kernel.h>
0010 #include <linux/list.h>
0011 #include <linux/clk.h>
0012 #include <linux/clk/ti.h>
0013
0014 #include "clock.h"
0015
0016 static struct ti_dt_clk omap2xxx_clks[] = {
0017     DT_CLK(NULL, "func_32k_ck", "func_32k_ck"),
0018     DT_CLK(NULL, "secure_32k_ck", "secure_32k_ck"),
0019     DT_CLK(NULL, "virt_12m_ck", "virt_12m_ck"),
0020     DT_CLK(NULL, "virt_13m_ck", "virt_13m_ck"),
0021     DT_CLK(NULL, "virt_19200000_ck", "virt_19200000_ck"),
0022     DT_CLK(NULL, "virt_26m_ck", "virt_26m_ck"),
0023     DT_CLK(NULL, "aplls_clkin_ck", "aplls_clkin_ck"),
0024     DT_CLK(NULL, "aplls_clkin_x2_ck", "aplls_clkin_x2_ck"),
0025     DT_CLK(NULL, "osc_ck", "osc_ck"),
0026     DT_CLK(NULL, "sys_ck", "sys_ck"),
0027     DT_CLK(NULL, "alt_ck", "alt_ck"),
0028     DT_CLK(NULL, "mcbsp_clks", "mcbsp_clks"),
0029     DT_CLK(NULL, "dpll_ck", "dpll_ck"),
0030     DT_CLK(NULL, "apll96_ck", "apll96_ck"),
0031     DT_CLK(NULL, "apll54_ck", "apll54_ck"),
0032     DT_CLK(NULL, "func_54m_ck", "func_54m_ck"),
0033     DT_CLK(NULL, "core_ck", "core_ck"),
0034     DT_CLK(NULL, "func_96m_ck", "func_96m_ck"),
0035     DT_CLK(NULL, "func_48m_ck", "func_48m_ck"),
0036     DT_CLK(NULL, "func_12m_ck", "func_12m_ck"),
0037     DT_CLK(NULL, "sys_clkout_src", "sys_clkout_src"),
0038     DT_CLK(NULL, "sys_clkout", "sys_clkout"),
0039     DT_CLK(NULL, "emul_ck", "emul_ck"),
0040     DT_CLK(NULL, "mpu_ck", "mpu_ck"),
0041     DT_CLK(NULL, "dsp_fck", "dsp_fck"),
0042     DT_CLK(NULL, "gfx_3d_fck", "gfx_3d_fck"),
0043     DT_CLK(NULL, "gfx_2d_fck", "gfx_2d_fck"),
0044     DT_CLK(NULL, "gfx_ick", "gfx_ick"),
0045     DT_CLK("omapdss_dss", "ick", "dss_ick"),
0046     DT_CLK(NULL, "dss_ick", "dss_ick"),
0047     DT_CLK(NULL, "dss1_fck", "dss1_fck"),
0048     DT_CLK(NULL, "dss2_fck", "dss2_fck"),
0049     DT_CLK(NULL, "dss_54m_fck", "dss_54m_fck"),
0050     DT_CLK(NULL, "core_l3_ck", "core_l3_ck"),
0051     DT_CLK(NULL, "ssi_fck", "ssi_ssr_sst_fck"),
0052     DT_CLK(NULL, "usb_l4_ick", "usb_l4_ick"),
0053     DT_CLK(NULL, "l4_ck", "l4_ck"),
0054     DT_CLK(NULL, "ssi_l4_ick", "ssi_l4_ick"),
0055     DT_CLK(NULL, "gpt1_ick", "gpt1_ick"),
0056     DT_CLK(NULL, "gpt1_fck", "gpt1_fck"),
0057     DT_CLK(NULL, "gpt2_ick", "gpt2_ick"),
0058     DT_CLK(NULL, "gpt2_fck", "gpt2_fck"),
0059     DT_CLK(NULL, "gpt3_ick", "gpt3_ick"),
0060     DT_CLK(NULL, "gpt3_fck", "gpt3_fck"),
0061     DT_CLK(NULL, "gpt4_ick", "gpt4_ick"),
0062     DT_CLK(NULL, "gpt4_fck", "gpt4_fck"),
0063     DT_CLK(NULL, "gpt5_ick", "gpt5_ick"),
0064     DT_CLK(NULL, "gpt5_fck", "gpt5_fck"),
0065     DT_CLK(NULL, "gpt6_ick", "gpt6_ick"),
0066     DT_CLK(NULL, "gpt6_fck", "gpt6_fck"),
0067     DT_CLK(NULL, "gpt7_ick", "gpt7_ick"),
0068     DT_CLK(NULL, "gpt7_fck", "gpt7_fck"),
0069     DT_CLK(NULL, "gpt8_ick", "gpt8_ick"),
0070     DT_CLK(NULL, "gpt8_fck", "gpt8_fck"),
0071     DT_CLK(NULL, "gpt9_ick", "gpt9_ick"),
0072     DT_CLK(NULL, "gpt9_fck", "gpt9_fck"),
0073     DT_CLK(NULL, "gpt10_ick", "gpt10_ick"),
0074     DT_CLK(NULL, "gpt10_fck", "gpt10_fck"),
0075     DT_CLK(NULL, "gpt11_ick", "gpt11_ick"),
0076     DT_CLK(NULL, "gpt11_fck", "gpt11_fck"),
0077     DT_CLK(NULL, "gpt12_ick", "gpt12_ick"),
0078     DT_CLK(NULL, "gpt12_fck", "gpt12_fck"),
0079     DT_CLK("omap-mcbsp.1", "ick", "mcbsp1_ick"),
0080     DT_CLK(NULL, "mcbsp1_ick", "mcbsp1_ick"),
0081     DT_CLK(NULL, "mcbsp1_fck", "mcbsp1_fck"),
0082     DT_CLK("omap-mcbsp.2", "ick", "mcbsp2_ick"),
0083     DT_CLK(NULL, "mcbsp2_ick", "mcbsp2_ick"),
0084     DT_CLK(NULL, "mcbsp2_fck", "mcbsp2_fck"),
0085     DT_CLK("omap2_mcspi.1", "ick", "mcspi1_ick"),
0086     DT_CLK(NULL, "mcspi1_ick", "mcspi1_ick"),
0087     DT_CLK(NULL, "mcspi1_fck", "mcspi1_fck"),
0088     DT_CLK("omap2_mcspi.2", "ick", "mcspi2_ick"),
0089     DT_CLK(NULL, "mcspi2_ick", "mcspi2_ick"),
0090     DT_CLK(NULL, "mcspi2_fck", "mcspi2_fck"),
0091     DT_CLK(NULL, "uart1_ick", "uart1_ick"),
0092     DT_CLK(NULL, "uart1_fck", "uart1_fck"),
0093     DT_CLK(NULL, "uart2_ick", "uart2_ick"),
0094     DT_CLK(NULL, "uart2_fck", "uart2_fck"),
0095     DT_CLK(NULL, "uart3_ick", "uart3_ick"),
0096     DT_CLK(NULL, "uart3_fck", "uart3_fck"),
0097     DT_CLK(NULL, "gpios_ick", "gpios_ick"),
0098     DT_CLK(NULL, "gpios_fck", "gpios_fck"),
0099     DT_CLK("omap_wdt", "ick", "mpu_wdt_ick"),
0100     DT_CLK(NULL, "mpu_wdt_ick", "mpu_wdt_ick"),
0101     DT_CLK(NULL, "mpu_wdt_fck", "mpu_wdt_fck"),
0102     DT_CLK(NULL, "sync_32k_ick", "sync_32k_ick"),
0103     DT_CLK(NULL, "wdt1_ick", "wdt1_ick"),
0104     DT_CLK(NULL, "omapctrl_ick", "omapctrl_ick"),
0105     DT_CLK("omap24xxcam", "fck", "cam_fck"),
0106     DT_CLK(NULL, "cam_fck", "cam_fck"),
0107     DT_CLK("omap24xxcam", "ick", "cam_ick"),
0108     DT_CLK(NULL, "cam_ick", "cam_ick"),
0109     DT_CLK(NULL, "mailboxes_ick", "mailboxes_ick"),
0110     DT_CLK(NULL, "wdt4_ick", "wdt4_ick"),
0111     DT_CLK(NULL, "wdt4_fck", "wdt4_fck"),
0112     DT_CLK(NULL, "mspro_ick", "mspro_ick"),
0113     DT_CLK(NULL, "mspro_fck", "mspro_fck"),
0114     DT_CLK(NULL, "fac_ick", "fac_ick"),
0115     DT_CLK(NULL, "fac_fck", "fac_fck"),
0116     DT_CLK("omap_hdq.0", "ick", "hdq_ick"),
0117     DT_CLK(NULL, "hdq_ick", "hdq_ick"),
0118     DT_CLK("omap_hdq.0", "fck", "hdq_fck"),
0119     DT_CLK(NULL, "hdq_fck", "hdq_fck"),
0120     DT_CLK("omap_i2c.1", "ick", "i2c1_ick"),
0121     DT_CLK(NULL, "i2c1_ick", "i2c1_ick"),
0122     DT_CLK("omap_i2c.2", "ick", "i2c2_ick"),
0123     DT_CLK(NULL, "i2c2_ick", "i2c2_ick"),
0124     DT_CLK(NULL, "gpmc_fck", "gpmc_fck"),
0125     DT_CLK(NULL, "sdma_fck", "sdma_fck"),
0126     DT_CLK(NULL, "sdma_ick", "sdma_ick"),
0127     DT_CLK(NULL, "sdrc_ick", "sdrc_ick"),
0128     DT_CLK(NULL, "des_ick", "des_ick"),
0129     DT_CLK("omap-sham", "ick", "sha_ick"),
0130     DT_CLK(NULL, "sha_ick", "sha_ick"),
0131     DT_CLK("omap_rng", "ick", "rng_ick"),
0132     DT_CLK(NULL, "rng_ick", "rng_ick"),
0133     DT_CLK("omap-aes", "ick", "aes_ick"),
0134     DT_CLK(NULL, "aes_ick", "aes_ick"),
0135     DT_CLK(NULL, "pka_ick", "pka_ick"),
0136     DT_CLK(NULL, "usb_fck", "usb_fck"),
0137     DT_CLK(NULL, "timer_32k_ck", "func_32k_ck"),
0138     DT_CLK(NULL, "timer_sys_ck", "sys_ck"),
0139     DT_CLK(NULL, "timer_ext_ck", "alt_ck"),
0140     { .node_name = NULL },
0141 };
0142
0143 static struct ti_dt_clk omap2420_clks[] = {
0144     DT_CLK(NULL, "sys_clkout2_src", "sys_clkout2_src"),
0145     DT_CLK(NULL, "sys_clkout2", "sys_clkout2"),
0146     DT_CLK(NULL, "dsp_ick", "dsp_ick"),
0147     DT_CLK(NULL, "iva1_ifck", "iva1_ifck"),
0148     DT_CLK(NULL, "iva1_mpu_int_ifck", "iva1_mpu_int_ifck"),
0149     DT_CLK(NULL, "wdt3_ick", "wdt3_ick"),
0150     DT_CLK(NULL, "wdt3_fck", "wdt3_fck"),
0151     DT_CLK("mmci-omap.0", "ick", "mmc_ick"),
0152     DT_CLK(NULL, "mmc_ick", "mmc_ick"),
0153     DT_CLK("mmci-omap.0", "fck", "mmc_fck"),
0154     DT_CLK(NULL, "mmc_fck", "mmc_fck"),
0155     DT_CLK(NULL, "eac_ick", "eac_ick"),
0156     DT_CLK(NULL, "eac_fck", "eac_fck"),
0157     DT_CLK(NULL, "i2c1_fck", "i2c1_fck"),
0158     DT_CLK(NULL, "i2c2_fck", "i2c2_fck"),
0159     DT_CLK(NULL, "vlynq_ick", "vlynq_ick"),
0160     DT_CLK(NULL, "vlynq_fck", "vlynq_fck"),
0161     DT_CLK("musb-hdrc", "fck", "osc_ck"),
0162     { .node_name = NULL },
0163 };
0164
0165 static struct ti_dt_clk omap2430_clks[] = {
0166     DT_CLK("twl", "fck", "osc_ck"),
0167     DT_CLK(NULL, "iva2_1_ick", "iva2_1_ick"),
0168     DT_CLK(NULL, "mdm_ick", "mdm_ick"),
0169     DT_CLK(NULL, "mdm_osc_ck", "mdm_osc_ck"),
0170     DT_CLK("omap-mcbsp.3", "ick", "mcbsp3_ick"),
0171     DT_CLK(NULL, "mcbsp3_ick", "mcbsp3_ick"),
0172     DT_CLK(NULL, "mcbsp3_fck", "mcbsp3_fck"),
0173     DT_CLK("omap-mcbsp.4", "ick", "mcbsp4_ick"),
0174     DT_CLK(NULL, "mcbsp4_ick", "mcbsp4_ick"),
0175     DT_CLK(NULL, "mcbsp4_fck", "mcbsp4_fck"),
0176     DT_CLK("omap-mcbsp.5", "ick", "mcbsp5_ick"),
0177     DT_CLK(NULL, "mcbsp5_ick", "mcbsp5_ick"),
0178     DT_CLK(NULL, "mcbsp5_fck", "mcbsp5_fck"),
0179     DT_CLK("omap2_mcspi.3", "ick", "mcspi3_ick"),
0180     DT_CLK(NULL, "mcspi3_ick", "mcspi3_ick"),
0181     DT_CLK(NULL, "mcspi3_fck", "mcspi3_fck"),
0182     DT_CLK(NULL, "icr_ick", "icr_ick"),
0183     DT_CLK(NULL, "i2chs1_fck", "i2chs1_fck"),
0184     DT_CLK(NULL, "i2chs2_fck", "i2chs2_fck"),
0185     DT_CLK("musb-omap2430", "ick", "usbhs_ick"),
0186     DT_CLK(NULL, "usbhs_ick", "usbhs_ick"),
0187     DT_CLK("omap_hsmmc.0", "ick", "mmchs1_ick"),
0188     DT_CLK(NULL, "mmchs1_ick", "mmchs1_ick"),
0189     DT_CLK(NULL, "mmchs1_fck", "mmchs1_fck"),
0190     DT_CLK("omap_hsmmc.1", "ick", "mmchs2_ick"),
0191     DT_CLK(NULL, "mmchs2_ick", "mmchs2_ick"),
0192     DT_CLK(NULL, "mmchs2_fck", "mmchs2_fck"),
0193     DT_CLK(NULL, "gpio5_ick", "gpio5_ick"),
0194     DT_CLK(NULL, "gpio5_fck", "gpio5_fck"),
0195     DT_CLK(NULL, "mdm_intc_ick", "mdm_intc_ick"),
0196     DT_CLK("omap_hsmmc.0", "mmchsdb_fck", "mmchsdb1_fck"),
0197     DT_CLK(NULL, "mmchsdb1_fck", "mmchsdb1_fck"),
0198     DT_CLK("omap_hsmmc.1", "mmchsdb_fck", "mmchsdb2_fck"),
0199     DT_CLK(NULL, "mmchsdb2_fck", "mmchsdb2_fck"),
0200     { .node_name = NULL },
0201 };
0202
0203 static const char *enable_init_clks[] = {
0204     "apll96_ck",
0205     "apll54_ck",
0206     "sync_32k_ick",
0207     "omapctrl_ick",
0208     "gpmc_fck",
0209     "sdrc_ick",
0210 };
0211
0212 enum {
0213     OMAP2_SOC_OMAP2420,
0214     OMAP2_SOC_OMAP2430,
0215 };
0216
0217 static int __init omap2xxx_dt_clk_init(int soc_type)
0218 {
0219     ti_dt_clocks_register(omap2xxx_clks);
0220
0221     if (soc_type == OMAP2_SOC_OMAP2420)
0222         ti_dt_clocks_register(omap2420_clks);
0223     else
0224         ti_dt_clocks_register(omap2430_clks);
0225
0226     omap2xxx_clkt_vps_init();
0227
0228     omap2_clk_disable_autoidle_all();
0229
0230     omap2_clk_enable_init_clocks(enable_init_clks,
0231                      ARRAY_SIZE(enable_init_clks));
0232
0233     pr_info("Clocking rate (Crystal/DPLL/MPU): %ld.%01ld/%ld/%ld MHz\n",
0234         (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 1000000),
0235         (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 100000) % 10,
0236         (clk_get_rate(clk_get_sys(NULL, "dpll_ck")) / 1000000),
0237         (clk_get_rate(clk_get_sys(NULL, "mpu_ck")) / 1000000));
0238
0239     return 0;
0240 }
0241
0242 int __init omap2420_dt_clk_init(void)
0243 {
0244     return omap2xxx_dt_clk_init(OMAP2_SOC_OMAP2420);
0245 }
0246
0247 int __init omap2430_dt_clk_init(void)
0248 {
0249     return omap2xxx_dt_clk_init(OMAP2_SOC_OMAP2430);
0250 }