clk/tegra/cvb.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Utility functions for parsing Tegra CVB voltage tables
0004  */
0005
0006 #ifndef __DRIVERS_CLK_TEGRA_CVB_H
0007 #define __DRIVERS_CLK_TEGRA_CVB_H
0008
0009 #include <linux/types.h>
0010
0011 struct device;
0012
0013 #define MAX_DVFS_FREQS  40
0014
0015 struct rail_alignment {
0016     int offset_uv;
0017     int step_uv;
0018 };
0019
0020 struct cvb_coefficients {
0021     int c0;
0022     int c1;
0023     int c2;
0024 };
0025
0026 struct cvb_table_freq_entry {
0027     unsigned long freq;
0028     struct cvb_coefficients coefficients;
0029 };
0030
0031 struct cvb_cpu_dfll_data {
0032     u32 tune0_low;
0033     u32 tune0_high;
0034     u32 tune1;
0035     unsigned int tune_high_min_millivolts;
0036 };
0037
0038 struct cvb_table {
0039     int speedo_id;
0040     int process_id;
0041
0042     int min_millivolts;
0043     int max_millivolts;
0044
0045     int speedo_scale;
0046     int voltage_scale;
0047     struct cvb_table_freq_entry entries[MAX_DVFS_FREQS];
0048     struct cvb_cpu_dfll_data cpu_dfll_data;
0049 };
0050
0051 const struct cvb_table *
0052 tegra_cvb_add_opp_table(struct device *dev, const struct cvb_table *cvb_tables,
0053             size_t count, struct rail_alignment *align,
0054             int process_id, int speedo_id, int speedo_value,
0055             unsigned long max_freq);
0056 void tegra_cvb_remove_opp_table(struct device *dev,
0057                 const struct cvb_table *table,
0058                 unsigned long max_freq);
0059
0060 #endif