clk/sunxi-ng/ccu-sun9i-a80-de.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright 2016 Chen-Yu Tsai
0004  *
0005  * Chen-Yu Tsai <wens@csie.org>
0006  */
0007
0008 #ifndef _CCU_SUN9I_A80_DE_H_
0009 #define _CCU_SUN9I_A80_DE_H_
0010
0011 #include <dt-bindings/clock/sun9i-a80-de.h>
0012 #include <dt-bindings/reset/sun9i-a80-de.h>
0013
0014 /* Intermediary clock dividers are not exported */
0015 #define CLK_FE0_DIV 31
0016 #define CLK_FE1_DIV 32
0017 #define CLK_FE2_DIV 33
0018 #define CLK_BE0_DIV 34
0019 #define CLK_BE1_DIV 35
0020 #define CLK_BE2_DIV 36
0021
0022 #define CLK_NUMBER  (CLK_BE2_DIV + 1)
0023
0024 #endif /* _CCU_SUN9I_A80_DE_H_ */