clk/spear/clk-frac-synth.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2012 ST Microelectronics
0004  * Viresh Kumar <vireshk@kernel.org>
0005  *
0006  * Fractional Synthesizer clock implementation
0007  */
0008
0009 #define pr_fmt(fmt) "clk-frac-synth: " fmt
0010
0011 #include <linux/clk-provider.h>
0012 #include <linux/slab.h>
0013 #include <linux/io.h>
0014 #include <linux/err.h>
0015 #include "clk.h"
0016
0017 #define DIV_FACTOR_MASK     0x1FFFF
0018
0019 /*
0020  * DOC: Fractional Synthesizer clock
0021  *
0022  * Fout from synthesizer can be given from below equation:
0023  *
0024  * Fout= Fin/2*div (division factor)
0025  * div is 17 bits:-
0026  *  0-13 (fractional part)
0027  *  14-16 (integer part)
0028  *  div is (16-14 bits).(13-0 bits) (in binary)
0029  *
0030  *  Fout = Fin/(2 * div)
0031  *  Fout = ((Fin / 10000)/(2 * div)) * 10000
0032  *  Fout = (2^14 * (Fin / 10000)/(2^14 * (2 * div))) * 10000
0033  *  Fout = (((Fin / 10000) << 14)/(2 * (div << 14))) * 10000
0034  *
0035  * div << 14 simply 17 bit value written at register.
0036  * Max error due to scaling down by 10000 is 10 KHz
0037  */
0038
0039 #define to_clk_frac(_hw) container_of(_hw, struct clk_frac, hw)
0040
0041 static unsigned long frac_calc_rate(struct clk_hw *hw, unsigned long prate,
0042         int index)
0043 {
0044     struct clk_frac *frac = to_clk_frac(hw);
0045     struct frac_rate_tbl *rtbl = frac->rtbl;
0046
0047     prate /= 10000;
0048     prate <<= 14;
0049     prate /= (2 * rtbl[index].div);
0050     prate *= 10000;
0051
0052     return prate;
0053 }
0054
0055 static long clk_frac_round_rate(struct clk_hw *hw, unsigned long drate,
0056         unsigned long *prate)
0057 {
0058     struct clk_frac *frac = to_clk_frac(hw);
0059     int unused;
0060
0061     return clk_round_rate_index(hw, drate, *prate, frac_calc_rate,
0062             frac->rtbl_cnt, &unused);
0063 }
0064
0065 static unsigned long clk_frac_recalc_rate(struct clk_hw *hw,
0066         unsigned long parent_rate)
0067 {
0068     struct clk_frac *frac = to_clk_frac(hw);
0069     unsigned long flags = 0;
0070     unsigned int div = 1, val;
0071
0072     if (frac->lock)
0073         spin_lock_irqsave(frac->lock, flags);
0074
0075     val = readl_relaxed(frac->reg);
0076
0077     if (frac->lock)
0078         spin_unlock_irqrestore(frac->lock, flags);
0079
0080     div = val & DIV_FACTOR_MASK;
0081
0082     if (!div)
0083         return 0;
0084
0085     parent_rate = parent_rate / 10000;
0086
0087     parent_rate = (parent_rate << 14) / (2 * div);
0088     return parent_rate * 10000;
0089 }
0090
0091 /* Configures new clock rate of frac */
0092 static int clk_frac_set_rate(struct clk_hw *hw, unsigned long drate,
0093                 unsigned long prate)
0094 {
0095     struct clk_frac *frac = to_clk_frac(hw);
0096     struct frac_rate_tbl *rtbl = frac->rtbl;
0097     unsigned long flags = 0, val;
0098     int i;
0099
0100     clk_round_rate_index(hw, drate, prate, frac_calc_rate, frac->rtbl_cnt,
0101             &i);
0102
0103     if (frac->lock)
0104         spin_lock_irqsave(frac->lock, flags);
0105
0106     val = readl_relaxed(frac->reg) & ~DIV_FACTOR_MASK;
0107     val |= rtbl[i].div & DIV_FACTOR_MASK;
0108     writel_relaxed(val, frac->reg);
0109
0110     if (frac->lock)
0111         spin_unlock_irqrestore(frac->lock, flags);
0112
0113     return 0;
0114 }
0115
0116 static const struct clk_ops clk_frac_ops = {
0117     .recalc_rate = clk_frac_recalc_rate,
0118     .round_rate = clk_frac_round_rate,
0119     .set_rate = clk_frac_set_rate,
0120 };
0121
0122 struct clk *clk_register_frac(const char *name, const char *parent_name,
0123         unsigned long flags, void __iomem *reg,
0124         struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock)
0125 {
0126     struct clk_init_data init;
0127     struct clk_frac *frac;
0128     struct clk *clk;
0129
0130     if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
0131         pr_err("Invalid arguments passed\n");
0132         return ERR_PTR(-EINVAL);
0133     }
0134
0135     frac = kzalloc(sizeof(*frac), GFP_KERNEL);
0136     if (!frac)
0137         return ERR_PTR(-ENOMEM);
0138
0139     /* struct clk_frac assignments */
0140     frac->reg = reg;
0141     frac->rtbl = rtbl;
0142     frac->rtbl_cnt = rtbl_cnt;
0143     frac->lock = lock;
0144     frac->hw.init = &init;
0145
0146     init.name = name;
0147     init.ops = &clk_frac_ops;
0148     init.flags = flags;
0149     init.parent_names = &parent_name;
0150     init.num_parents = 1;
0151
0152     clk = clk_register(NULL, &frac->hw);
0153     if (!IS_ERR_OR_NULL(clk))
0154         return clk;
0155
0156     pr_err("clk register failed\n");
0157     kfree(frac);
0158
0159     return NULL;
0160 }