0001 # SPDX-License-Identifier: GPL-2.0
0002 config CLK_INTEL_SOCFPGA
0003 bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_INTEL_SOCFPGA
0004 default ARCH_INTEL_SOCFPGA
0005 help
0006 Support for the clock controllers present on Intel SoCFPGA and eASIC
0007 devices like Aria, Cyclone, Stratix 10, Agilex and N5X eASIC.
0008
0009 if CLK_INTEL_SOCFPGA
0010
0011 config CLK_INTEL_SOCFPGA32
0012 bool "Intel Aria / Cyclone clock controller support" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA)
0013 default ARM && ARCH_INTEL_SOCFPGA
0014
0015 config CLK_INTEL_SOCFPGA64
0016 bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && (!ARM64 || !ARCH_INTEL_SOCFPGA)
0017 default ARM64 && ARCH_INTEL_SOCFPGA
0018
0019 endif # CLK_INTEL_SOCFPGA
