OSCL-LXR

0001 # SPDX-License-Identifier: GPL-2.0
0002 #
0003 # Rockchip Clock specific Makefile
0004 #
0005
0006 obj-$(CONFIG_COMMON_CLK_ROCKCHIP) += clk-rockchip.o
0007
0008 clk-rockchip-y += clk.o
0009 clk-rockchip-y += clk-pll.o
0010 clk-rockchip-y += clk-cpu.o
0011 clk-rockchip-y += clk-half-divider.o
0012 clk-rockchip-y += clk-inverter.o
0013 clk-rockchip-y += clk-mmc-phase.o
0014 clk-rockchip-y += clk-muxgrf.o
0015 clk-rockchip-y += clk-ddr.o
0016 clk-rockchip-$(CONFIG_RESET_CONTROLLER) += softrst.o
0017
0018 obj-$(CONFIG_CLK_PX30)          += clk-px30.o
0019 obj-$(CONFIG_CLK_RV110X)        += clk-rv1108.o
0020 obj-$(CONFIG_CLK_RK3036)        += clk-rk3036.o
0021 obj-$(CONFIG_CLK_RK312X)        += clk-rk3128.o
0022 obj-$(CONFIG_CLK_RK3188)        += clk-rk3188.o
0023 obj-$(CONFIG_CLK_RK322X)        += clk-rk3228.o
0024 obj-$(CONFIG_CLK_RK3288)        += clk-rk3288.o
0025 obj-$(CONFIG_CLK_RK3308)        += clk-rk3308.o
0026 obj-$(CONFIG_CLK_RK3328)        += clk-rk3328.o
0027 obj-$(CONFIG_CLK_RK3368)        += clk-rk3368.o
0028 obj-$(CONFIG_CLK_RK3399)        += clk-rk3399.o
0029 obj-$(CONFIG_CLK_RK3568)        += clk-rk3568.o