0001 # SPDX-License-Identifier: GPL-2.0
0002
0003 config CLK_RENESAS
0004 bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS
0005 default y if ARCH_RENESAS
0006 select CLK_EMEV2 if ARCH_EMEV2
0007 select CLK_RZA1 if ARCH_R7S72100
0008 select CLK_R7S9210 if ARCH_R7S9210
0009 select CLK_R8A73A4 if ARCH_R8A73A4
0010 select CLK_R8A7740 if ARCH_R8A7740
0011 select CLK_R8A7742 if ARCH_R8A7742
0012 select CLK_R8A7743 if ARCH_R8A7743 || ARCH_R8A7744
0013 select CLK_R8A7745 if ARCH_R8A7745
0014 select CLK_R8A77470 if ARCH_R8A77470
0015 select CLK_R8A774A1 if ARCH_R8A774A1
0016 select CLK_R8A774B1 if ARCH_R8A774B1
0017 select CLK_R8A774C0 if ARCH_R8A774C0
0018 select CLK_R8A774E1 if ARCH_R8A774E1
0019 select CLK_R8A7778 if ARCH_R8A7778
0020 select CLK_R8A7779 if ARCH_R8A7779
0021 select CLK_R8A7790 if ARCH_R8A7790
0022 select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
0023 select CLK_R8A7792 if ARCH_R8A7792
0024 select CLK_R8A7794 if ARCH_R8A7794
0025 select CLK_R8A7795 if ARCH_R8A77950 || ARCH_R8A77951
0026 select CLK_R8A77960 if ARCH_R8A77960
0027 select CLK_R8A77961 if ARCH_R8A77961
0028 select CLK_R8A77965 if ARCH_R8A77965
0029 select CLK_R8A77970 if ARCH_R8A77970
0030 select CLK_R8A77980 if ARCH_R8A77980
0031 select CLK_R8A77990 if ARCH_R8A77990
0032 select CLK_R8A77995 if ARCH_R8A77995
0033 select CLK_R8A779A0 if ARCH_R8A779A0
0034 select CLK_R8A779F0 if ARCH_R8A779F0
0035 select CLK_R8A779G0 if ARCH_R8A779G0
0036 select CLK_R9A06G032 if ARCH_R9A06G032
0037 select CLK_R9A07G043 if ARCH_R9A07G043
0038 select CLK_R9A07G044 if ARCH_R9A07G044
0039 select CLK_R9A07G054 if ARCH_R9A07G054
0040 select CLK_R9A09G011 if ARCH_R9A09G011
0041 select CLK_SH73A0 if ARCH_SH73A0
0042
0043 if CLK_RENESAS
0044
0045 # SoC
0046 config CLK_EMEV2
0047 bool "Emma Mobile EV2 clock support" if COMPILE_TEST
0048
0049 config CLK_RZA1
0050 bool "RZ/A1H clock support" if COMPILE_TEST
0051 select CLK_RENESAS_CPG_MSTP
0052
0053 config CLK_R7S9210
0054 bool "RZ/A2 clock support" if COMPILE_TEST
0055 select CLK_RENESAS_CPG_MSSR
0056
0057 config CLK_R8A73A4
0058 bool "R-Mobile APE6 clock support" if COMPILE_TEST
0059 select CLK_RENESAS_CPG_MSTP
0060 select CLK_RENESAS_DIV6
0061
0062 config CLK_R8A7740
0063 bool "R-Mobile A1 clock support" if COMPILE_TEST
0064 select CLK_RENESAS_CPG_MSTP
0065 select CLK_RENESAS_DIV6
0066
0067 config CLK_R8A7742
0068 bool "RZ/G1H clock support" if COMPILE_TEST
0069 select CLK_RCAR_GEN2_CPG
0070
0071 config CLK_R8A7743
0072 bool "RZ/G1M clock support" if COMPILE_TEST
0073 select CLK_RCAR_GEN2_CPG
0074
0075 config CLK_R8A7745
0076 bool "RZ/G1E clock support" if COMPILE_TEST
0077 select CLK_RCAR_GEN2_CPG
0078
0079 config CLK_R8A77470
0080 bool "RZ/G1C clock support" if COMPILE_TEST
0081 select CLK_RCAR_GEN2_CPG
0082
0083 config CLK_R8A774A1
0084 bool "RZ/G2M clock support" if COMPILE_TEST
0085 select CLK_RCAR_GEN3_CPG
0086
0087 config CLK_R8A774B1
0088 bool "RZ/G2N clock support" if COMPILE_TEST
0089 select CLK_RCAR_GEN3_CPG
0090
0091 config CLK_R8A774C0
0092 bool "RZ/G2E clock support" if COMPILE_TEST
0093 select CLK_RCAR_GEN3_CPG
0094
0095 config CLK_R8A774E1
0096 bool "RZ/G2H clock support" if COMPILE_TEST
0097 select CLK_RCAR_GEN3_CPG
0098
0099 config CLK_R8A7778
0100 bool "R-Car M1A clock support" if COMPILE_TEST
0101 select CLK_RENESAS_CPG_MSTP
0102
0103 config CLK_R8A7779
0104 bool "R-Car H1 clock support" if COMPILE_TEST
0105 select CLK_RENESAS_CPG_MSTP
0106
0107 config CLK_R8A7790
0108 bool "R-Car H2 clock support" if COMPILE_TEST
0109 select CLK_RCAR_GEN2_CPG
0110
0111 config CLK_R8A7791
0112 bool "R-Car M2-W/N clock support" if COMPILE_TEST
0113 select CLK_RCAR_GEN2_CPG
0114
0115 config CLK_R8A7792
0116 bool "R-Car V2H clock support" if COMPILE_TEST
0117 select CLK_RCAR_GEN2_CPG
0118
0119 config CLK_R8A7794
0120 bool "R-Car E2 clock support" if COMPILE_TEST
0121 select CLK_RCAR_GEN2_CPG
0122
0123 config CLK_R8A7795
0124 bool "R-Car H3 clock support" if COMPILE_TEST
0125 select CLK_RCAR_GEN3_CPG
0126
0127 config CLK_R8A77960
0128 bool "R-Car M3-W clock support" if COMPILE_TEST
0129 select CLK_RCAR_GEN3_CPG
0130
0131 config CLK_R8A77961
0132 bool "R-Car M3-W+ clock support" if COMPILE_TEST
0133 select CLK_RCAR_GEN3_CPG
0134
0135 config CLK_R8A77965
0136 bool "R-Car M3-N clock support" if COMPILE_TEST
0137 select CLK_RCAR_GEN3_CPG
0138
0139 config CLK_R8A77970
0140 bool "R-Car V3M clock support" if COMPILE_TEST
0141 select CLK_RCAR_GEN3_CPG
0142
0143 config CLK_R8A77980
0144 bool "R-Car V3H clock support" if COMPILE_TEST
0145 select CLK_RCAR_GEN3_CPG
0146
0147 config CLK_R8A77990
0148 bool "R-Car E3 clock support" if COMPILE_TEST
0149 select CLK_RCAR_GEN3_CPG
0150
0151 config CLK_R8A77995
0152 bool "R-Car D3 clock support" if COMPILE_TEST
0153 select CLK_RCAR_GEN3_CPG
0154
0155 config CLK_R8A779A0
0156 bool "R-Car V3U clock support" if COMPILE_TEST
0157 select CLK_RCAR_GEN4_CPG
0158
0159 config CLK_R8A779F0
0160 bool "R-Car S4-8 clock support" if COMPILE_TEST
0161 select CLK_RCAR_GEN4_CPG
0162
0163 config CLK_R8A779G0
0164 bool "R-Car V4H clock support" if COMPILE_TEST
0165 select CLK_RCAR_GEN4_CPG
0166
0167 config CLK_R9A06G032
0168 bool "RZ/N1D clock support" if COMPILE_TEST
0169
0170 config CLK_R9A07G043
0171 bool "RZ/G2UL clock support" if COMPILE_TEST
0172 select CLK_RZG2L
0173
0174 config CLK_R9A07G044
0175 bool "RZ/G2L clock support" if COMPILE_TEST
0176 select CLK_RZG2L
0177
0178 config CLK_R9A07G054
0179 bool "RZ/V2L clock support" if COMPILE_TEST
0180 select CLK_RZG2L
0181
0182 config CLK_R9A09G011
0183 bool "RZ/V2M clock support" if COMPILE_TEST
0184 select CLK_RZG2L
0185
0186 config CLK_SH73A0
0187 bool "SH-Mobile AG5 clock support" if COMPILE_TEST
0188 select CLK_RENESAS_CPG_MSTP
0189 select CLK_RENESAS_DIV6
0190
0191
0192 # Family
0193 config CLK_RCAR_CPG_LIB
0194 bool "CPG/MSSR library functions" if COMPILE_TEST
0195
0196 config CLK_RCAR_GEN2_CPG
0197 bool "R-Car Gen2 CPG clock support" if COMPILE_TEST
0198 select CLK_RENESAS_CPG_MSSR
0199
0200 config CLK_RCAR_GEN3_CPG
0201 bool "R-Car Gen3 and RZ/G2 CPG clock support" if COMPILE_TEST
0202 select CLK_RCAR_CPG_LIB
0203 select CLK_RENESAS_CPG_MSSR
0204
0205 config CLK_RCAR_GEN4_CPG
0206 bool "R-Car Gen4 clock support" if COMPILE_TEST
0207 select CLK_RCAR_CPG_LIB
0208 select CLK_RENESAS_CPG_MSSR
0209
0210 config CLK_RCAR_USB2_CLOCK_SEL
0211 bool "Renesas R-Car USB2 clock selector support"
0212 depends on ARCH_RENESAS || COMPILE_TEST
0213 select RESET_CONTROLLER
0214 help
0215 This is a driver for R-Car USB2 clock selector
0216
0217 config CLK_RZG2L
0218 bool "Renesas RZ/{G2L,G2UL,V2L} family clock support" if COMPILE_TEST
0219 select RESET_CONTROLLER
0220
0221 # Generic
0222 config CLK_RENESAS_CPG_MSSR
0223 bool "CPG/MSSR clock support" if COMPILE_TEST
0224 select CLK_RENESAS_DIV6
0225
0226 config CLK_RENESAS_CPG_MSTP
0227 bool "MSTP clock support" if COMPILE_TEST
0228
0229 config CLK_RENESAS_DIV6
0230 bool "DIV6 clock support" if COMPILE_TEST
0231
0232 endif # CLK_RENESAS
