clk/qcom/krait-cc.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 // Copyright (c) 2018, The Linux Foundation. All rights reserved.
0003
0004 #include <linux/kernel.h>
0005 #include <linux/init.h>
0006 #include <linux/module.h>
0007 #include <linux/platform_device.h>
0008 #include <linux/err.h>
0009 #include <linux/io.h>
0010 #include <linux/of.h>
0011 #include <linux/of_device.h>
0012 #include <linux/clk.h>
0013 #include <linux/clk-provider.h>
0014 #include <linux/slab.h>
0015
0016 #include "clk-krait.h"
0017
0018 static unsigned int sec_mux_map[] = {
0019     2,
0020     0,
0021 };
0022
0023 static unsigned int pri_mux_map[] = {
0024     1,
0025     2,
0026     0,
0027 };
0028
0029 /*
0030  * Notifier function for switching the muxes to safe parent
0031  * while the hfpll is getting reprogrammed.
0032  */
0033 static int krait_notifier_cb(struct notifier_block *nb,
0034                  unsigned long event,
0035                  void *data)
0036 {
0037     int ret = 0;
0038     struct krait_mux_clk *mux = container_of(nb, struct krait_mux_clk,
0039                          clk_nb);
0040     /* Switch to safe parent */
0041     if (event == PRE_RATE_CHANGE) {
0042         mux->old_index = krait_mux_clk_ops.get_parent(&mux->hw);
0043         ret = krait_mux_clk_ops.set_parent(&mux->hw, mux->safe_sel);
0044         mux->reparent = false;
0045     /*
0046      * By the time POST_RATE_CHANGE notifier is called,
0047      * clk framework itself would have changed the parent for the new rate.
0048      * Only otherwise, put back to the old parent.
0049      */
0050     } else if (event == POST_RATE_CHANGE) {
0051         if (!mux->reparent)
0052             ret = krait_mux_clk_ops.set_parent(&mux->hw,
0053                                mux->old_index);
0054     }
0055
0056     return notifier_from_errno(ret);
0057 }
0058
0059 static int krait_notifier_register(struct device *dev, struct clk *clk,
0060                    struct krait_mux_clk *mux)
0061 {
0062     int ret = 0;
0063
0064     mux->clk_nb.notifier_call = krait_notifier_cb;
0065     ret = clk_notifier_register(clk, &mux->clk_nb);
0066     if (ret)
0067         dev_err(dev, "failed to register clock notifier: %d\n", ret);
0068
0069     return ret;
0070 }
0071
0072 static int
0073 krait_add_div(struct device *dev, int id, const char *s, unsigned int offset)
0074 {
0075     struct krait_div2_clk *div;
0076     struct clk_init_data init = {
0077         .num_parents = 1,
0078         .ops = &krait_div2_clk_ops,
0079         .flags = CLK_SET_RATE_PARENT,
0080     };
0081     const char *p_names[1];
0082     struct clk *clk;
0083
0084     div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL);
0085     if (!div)
0086         return -ENOMEM;
0087
0088     div->width = 2;
0089     div->shift = 6;
0090     div->lpl = id >= 0;
0091     div->offset = offset;
0092     div->hw.init = &init;
0093
0094     init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s);
0095     if (!init.name)
0096         return -ENOMEM;
0097
0098     init.parent_names = p_names;
0099     p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s);
0100     if (!p_names[0]) {
0101         kfree(init.name);
0102         return -ENOMEM;
0103     }
0104
0105     clk = devm_clk_register(dev, &div->hw);
0106     kfree(p_names[0]);
0107     kfree(init.name);
0108
0109     return PTR_ERR_OR_ZERO(clk);
0110 }
0111
0112 static int
0113 krait_add_sec_mux(struct device *dev, int id, const char *s,
0114           unsigned int offset, bool unique_aux)
0115 {
0116     int ret;
0117     struct krait_mux_clk *mux;
0118     static const char *sec_mux_list[] = {
0119         "acpu_aux",
0120         "qsb",
0121     };
0122     struct clk_init_data init = {
0123         .parent_names = sec_mux_list,
0124         .num_parents = ARRAY_SIZE(sec_mux_list),
0125         .ops = &krait_mux_clk_ops,
0126         .flags = CLK_SET_RATE_PARENT,
0127     };
0128     struct clk *clk;
0129
0130     mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
0131     if (!mux)
0132         return -ENOMEM;
0133
0134     mux->offset = offset;
0135     mux->lpl = id >= 0;
0136     mux->mask = 0x3;
0137     mux->shift = 2;
0138     mux->parent_map = sec_mux_map;
0139     mux->hw.init = &init;
0140     mux->safe_sel = 0;
0141
0142     /* Checking for qcom,krait-cc-v1 or qcom,krait-cc-v2 is not
0143      * enough to limit this to apq/ipq8064. Directly check machine
0144      * compatible to correctly handle this errata.
0145      */
0146     if (of_machine_is_compatible("qcom,ipq8064") ||
0147         of_machine_is_compatible("qcom,apq8064"))
0148         mux->disable_sec_src_gating = true;
0149
0150     init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
0151     if (!init.name)
0152         return -ENOMEM;
0153
0154     if (unique_aux) {
0155         sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
0156         if (!sec_mux_list[0]) {
0157             clk = ERR_PTR(-ENOMEM);
0158             goto err_aux;
0159         }
0160     }
0161
0162     clk = devm_clk_register(dev, &mux->hw);
0163
0164     ret = krait_notifier_register(dev, clk, mux);
0165     if (ret)
0166         goto unique_aux;
0167
0168 unique_aux:
0169     if (unique_aux)
0170         kfree(sec_mux_list[0]);
0171 err_aux:
0172     kfree(init.name);
0173     return PTR_ERR_OR_ZERO(clk);
0174 }
0175
0176 static struct clk *
0177 krait_add_pri_mux(struct device *dev, int id, const char *s,
0178           unsigned int offset)
0179 {
0180     int ret;
0181     struct krait_mux_clk *mux;
0182     const char *p_names[3];
0183     struct clk_init_data init = {
0184         .parent_names = p_names,
0185         .num_parents = ARRAY_SIZE(p_names),
0186         .ops = &krait_mux_clk_ops,
0187         .flags = CLK_SET_RATE_PARENT,
0188     };
0189     struct clk *clk;
0190
0191     mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
0192     if (!mux)
0193         return ERR_PTR(-ENOMEM);
0194
0195     mux->mask = 0x3;
0196     mux->shift = 0;
0197     mux->offset = offset;
0198     mux->lpl = id >= 0;
0199     mux->parent_map = pri_mux_map;
0200     mux->hw.init = &init;
0201     mux->safe_sel = 2;
0202
0203     init.name = kasprintf(GFP_KERNEL, "krait%s_pri_mux", s);
0204     if (!init.name)
0205         return ERR_PTR(-ENOMEM);
0206
0207     p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s);
0208     if (!p_names[0]) {
0209         clk = ERR_PTR(-ENOMEM);
0210         goto err_p0;
0211     }
0212
0213     p_names[1] = kasprintf(GFP_KERNEL, "hfpll%s_div", s);
0214     if (!p_names[1]) {
0215         clk = ERR_PTR(-ENOMEM);
0216         goto err_p1;
0217     }
0218
0219     p_names[2] = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
0220     if (!p_names[2]) {
0221         clk = ERR_PTR(-ENOMEM);
0222         goto err_p2;
0223     }
0224
0225     clk = devm_clk_register(dev, &mux->hw);
0226
0227     ret = krait_notifier_register(dev, clk, mux);
0228     if (ret)
0229         goto err_p3;
0230 err_p3:
0231     kfree(p_names[2]);
0232 err_p2:
0233     kfree(p_names[1]);
0234 err_p1:
0235     kfree(p_names[0]);
0236 err_p0:
0237     kfree(init.name);
0238     return clk;
0239 }
0240
0241 /* id < 0 for L2, otherwise id == physical CPU number */
0242 static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux)
0243 {
0244     int ret;
0245     unsigned int offset;
0246     void *p = NULL;
0247     const char *s;
0248     struct clk *clk;
0249
0250     if (id >= 0) {
0251         offset = 0x4501 + (0x1000 * id);
0252         s = p = kasprintf(GFP_KERNEL, "%d", id);
0253         if (!s)
0254             return ERR_PTR(-ENOMEM);
0255     } else {
0256         offset = 0x500;
0257         s = "_l2";
0258     }
0259
0260     ret = krait_add_div(dev, id, s, offset);
0261     if (ret) {
0262         clk = ERR_PTR(ret);
0263         goto err;
0264     }
0265
0266     ret = krait_add_sec_mux(dev, id, s, offset, unique_aux);
0267     if (ret) {
0268         clk = ERR_PTR(ret);
0269         goto err;
0270     }
0271
0272     clk = krait_add_pri_mux(dev, id, s, offset);
0273 err:
0274     kfree(p);
0275     return clk;
0276 }
0277
0278 static struct clk *krait_of_get(struct of_phandle_args *clkspec, void *data)
0279 {
0280     unsigned int idx = clkspec->args[0];
0281     struct clk **clks = data;
0282
0283     if (idx >= 5) {
0284         pr_err("%s: invalid clock index %d\n", __func__, idx);
0285         return ERR_PTR(-EINVAL);
0286     }
0287
0288     return clks[idx] ? : ERR_PTR(-ENODEV);
0289 }
0290
0291 static const struct of_device_id krait_cc_match_table[] = {
0292     { .compatible = "qcom,krait-cc-v1", (void *)1UL },
0293     { .compatible = "qcom,krait-cc-v2" },
0294     {}
0295 };
0296 MODULE_DEVICE_TABLE(of, krait_cc_match_table);
0297
0298 static int krait_cc_probe(struct platform_device *pdev)
0299 {
0300     struct device *dev = &pdev->dev;
0301     const struct of_device_id *id;
0302     unsigned long cur_rate, aux_rate;
0303     int cpu;
0304     struct clk *clk;
0305     struct clk **clks;
0306     struct clk *l2_pri_mux_clk;
0307
0308     id = of_match_device(krait_cc_match_table, dev);
0309     if (!id)
0310         return -ENODEV;
0311
0312     /* Rate is 1 because 0 causes problems for __clk_mux_determine_rate */
0313     clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1);
0314     if (IS_ERR(clk))
0315         return PTR_ERR(clk);
0316
0317     if (!id->data) {
0318         clk = clk_register_fixed_factor(dev, "acpu_aux",
0319                         "gpll0_vote", 0, 1, 2);
0320         if (IS_ERR(clk))
0321             return PTR_ERR(clk);
0322     }
0323
0324     /* Krait configurations have at most 4 CPUs and one L2 */
0325     clks = devm_kcalloc(dev, 5, sizeof(*clks), GFP_KERNEL);
0326     if (!clks)
0327         return -ENOMEM;
0328
0329     for_each_possible_cpu(cpu) {
0330         clk = krait_add_clks(dev, cpu, id->data);
0331         if (IS_ERR(clk))
0332             return PTR_ERR(clk);
0333         clks[cpu] = clk;
0334     }
0335
0336     l2_pri_mux_clk = krait_add_clks(dev, -1, id->data);
0337     if (IS_ERR(l2_pri_mux_clk))
0338         return PTR_ERR(l2_pri_mux_clk);
0339     clks[4] = l2_pri_mux_clk;
0340
0341     /*
0342      * We don't want the CPU or L2 clocks to be turned off at late init
0343      * if CPUFREQ or HOTPLUG configs are disabled. So, bump up the
0344      * refcount of these clocks. Any cpufreq/hotplug manager can assume
0345      * that the clocks have already been prepared and enabled by the time
0346      * they take over.
0347      */
0348     for_each_online_cpu(cpu) {
0349         clk_prepare_enable(l2_pri_mux_clk);
0350         WARN(clk_prepare_enable(clks[cpu]),
0351              "Unable to turn on CPU%d clock", cpu);
0352     }
0353
0354     /*
0355      * Force reinit of HFPLLs and muxes to overwrite any potential
0356      * incorrect configuration of HFPLLs and muxes by the bootloader.
0357      * While at it, also make sure the cores are running at known rates
0358      * and print the current rate.
0359      *
0360      * The clocks are set to aux clock rate first to make sure the
0361      * secondary mux is not sourcing off of QSB. The rate is then set to
0362      * two different rates to force a HFPLL reinit under all
0363      * circumstances.
0364      */
0365     cur_rate = clk_get_rate(l2_pri_mux_clk);
0366     aux_rate = 384000000;
0367     if (cur_rate == 1) {
0368         pr_info("L2 @ QSB rate. Forcing new rate.\n");
0369         cur_rate = aux_rate;
0370     }
0371     clk_set_rate(l2_pri_mux_clk, aux_rate);
0372     clk_set_rate(l2_pri_mux_clk, 2);
0373     clk_set_rate(l2_pri_mux_clk, cur_rate);
0374     pr_info("L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000);
0375     for_each_possible_cpu(cpu) {
0376         clk = clks[cpu];
0377         cur_rate = clk_get_rate(clk);
0378         if (cur_rate == 1) {
0379             pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu);
0380             cur_rate = aux_rate;
0381         }
0382
0383         clk_set_rate(clk, aux_rate);
0384         clk_set_rate(clk, 2);
0385         clk_set_rate(clk, cur_rate);
0386         pr_info("CPU%d @ %lu KHz\n", cpu, clk_get_rate(clk) / 1000);
0387     }
0388
0389     of_clk_add_provider(dev->of_node, krait_of_get, clks);
0390
0391     return 0;
0392 }
0393
0394 static struct platform_driver krait_cc_driver = {
0395     .probe = krait_cc_probe,
0396     .driver = {
0397         .name = "krait-cc",
0398         .of_match_table = krait_cc_match_table,
0399     },
0400 };
0401 module_platform_driver(krait_cc_driver);
0402
0403 MODULE_DESCRIPTION("Krait CPU Clock Driver");
0404 MODULE_LICENSE("GPL v2");
0405 MODULE_ALIAS("platform:krait-cc");