clk/qcom/common.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
0004  */
0005
0006 #include <linux/export.h>
0007 #include <linux/module.h>
0008 #include <linux/regmap.h>
0009 #include <linux/platform_device.h>
0010 #include <linux/clk-provider.h>
0011 #include <linux/reset-controller.h>
0012 #include <linux/of.h>
0013
0014 #include "common.h"
0015 #include "clk-rcg.h"
0016 #include "clk-regmap.h"
0017 #include "reset.h"
0018 #include "gdsc.h"
0019
0020 struct qcom_cc {
0021     struct qcom_reset_controller reset;
0022     struct clk_regmap **rclks;
0023     size_t num_rclks;
0024 };
0025
0026 const
0027 struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, unsigned long rate)
0028 {
0029     if (!f)
0030         return NULL;
0031
0032     if (!f->freq)
0033         return f;
0034
0035     for (; f->freq; f++)
0036         if (rate <= f->freq)
0037             return f;
0038
0039     /* Default to our fastest rate */
0040     return f - 1;
0041 }
0042 EXPORT_SYMBOL_GPL(qcom_find_freq);
0043
0044 const struct freq_tbl *qcom_find_freq_floor(const struct freq_tbl *f,
0045                         unsigned long rate)
0046 {
0047     const struct freq_tbl *best = NULL;
0048
0049     for ( ; f->freq; f++) {
0050         if (rate >= f->freq)
0051             best = f;
0052         else
0053             break;
0054     }
0055
0056     return best;
0057 }
0058 EXPORT_SYMBOL_GPL(qcom_find_freq_floor);
0059
0060 int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map, u8 src)
0061 {
0062     int i, num_parents = clk_hw_get_num_parents(hw);
0063
0064     for (i = 0; i < num_parents; i++)
0065         if (src == map[i].src)
0066             return i;
0067
0068     return -ENOENT;
0069 }
0070 EXPORT_SYMBOL_GPL(qcom_find_src_index);
0071
0072 int qcom_find_cfg_index(struct clk_hw *hw, const struct parent_map *map, u8 cfg)
0073 {
0074     int i, num_parents = clk_hw_get_num_parents(hw);
0075
0076     for (i = 0; i < num_parents; i++)
0077         if (cfg == map[i].cfg)
0078             return i;
0079
0080     return -ENOENT;
0081 }
0082 EXPORT_SYMBOL_GPL(qcom_find_cfg_index);
0083
0084 struct regmap *
0085 qcom_cc_map(struct platform_device *pdev, const struct qcom_cc_desc *desc)
0086 {
0087     void __iomem *base;
0088     struct device *dev = &pdev->dev;
0089
0090     base = devm_platform_ioremap_resource(pdev, 0);
0091     if (IS_ERR(base))
0092         return ERR_CAST(base);
0093
0094     return devm_regmap_init_mmio(dev, base, desc->config);
0095 }
0096 EXPORT_SYMBOL_GPL(qcom_cc_map);
0097
0098 void
0099 qcom_pll_set_fsm_mode(struct regmap *map, u32 reg, u8 bias_count, u8 lock_count)
0100 {
0101     u32 val;
0102     u32 mask;
0103
0104     /* De-assert reset to FSM */
0105     regmap_update_bits(map, reg, PLL_VOTE_FSM_RESET, 0);
0106
0107     /* Program bias count and lock count */
0108     val = bias_count << PLL_BIAS_COUNT_SHIFT |
0109         lock_count << PLL_LOCK_COUNT_SHIFT;
0110     mask = PLL_BIAS_COUNT_MASK << PLL_BIAS_COUNT_SHIFT;
0111     mask |= PLL_LOCK_COUNT_MASK << PLL_LOCK_COUNT_SHIFT;
0112     regmap_update_bits(map, reg, mask, val);
0113
0114     /* Enable PLL FSM voting */
0115     regmap_update_bits(map, reg, PLL_VOTE_FSM_ENA, PLL_VOTE_FSM_ENA);
0116 }
0117 EXPORT_SYMBOL_GPL(qcom_pll_set_fsm_mode);
0118
0119 static void qcom_cc_gdsc_unregister(void *data)
0120 {
0121     gdsc_unregister(data);
0122 }
0123
0124 /*
0125  * Backwards compatibility with old DTs. Register a pass-through factor 1/1
0126  * clock to translate 'path' clk into 'name' clk and register the 'path'
0127  * clk as a fixed rate clock if it isn't present.
0128  */
0129 static int _qcom_cc_register_board_clk(struct device *dev, const char *path,
0130                        const char *name, unsigned long rate,
0131                        bool add_factor)
0132 {
0133     struct device_node *node = NULL;
0134     struct device_node *clocks_node;
0135     struct clk_fixed_factor *factor;
0136     struct clk_fixed_rate *fixed;
0137     struct clk_init_data init_data = { };
0138     int ret;
0139
0140     clocks_node = of_find_node_by_path("/clocks");
0141     if (clocks_node) {
0142         node = of_get_child_by_name(clocks_node, path);
0143         of_node_put(clocks_node);
0144     }
0145
0146     if (!node) {
0147         fixed = devm_kzalloc(dev, sizeof(*fixed), GFP_KERNEL);
0148         if (!fixed)
0149             return -EINVAL;
0150
0151         fixed->fixed_rate = rate;
0152         fixed->hw.init = &init_data;
0153
0154         init_data.name = path;
0155         init_data.ops = &clk_fixed_rate_ops;
0156
0157         ret = devm_clk_hw_register(dev, &fixed->hw);
0158         if (ret)
0159             return ret;
0160     }
0161     of_node_put(node);
0162
0163     if (add_factor) {
0164         factor = devm_kzalloc(dev, sizeof(*factor), GFP_KERNEL);
0165         if (!factor)
0166             return -EINVAL;
0167
0168         factor->mult = factor->div = 1;
0169         factor->hw.init = &init_data;
0170
0171         init_data.name = name;
0172         init_data.parent_names = &path;
0173         init_data.num_parents = 1;
0174         init_data.flags = 0;
0175         init_data.ops = &clk_fixed_factor_ops;
0176
0177         ret = devm_clk_hw_register(dev, &factor->hw);
0178         if (ret)
0179             return ret;
0180     }
0181
0182     return 0;
0183 }
0184
0185 int qcom_cc_register_board_clk(struct device *dev, const char *path,
0186                    const char *name, unsigned long rate)
0187 {
0188     bool add_factor = true;
0189
0190     /*
0191      * TODO: The RPM clock driver currently does not support the xo clock.
0192      * When xo is added to the RPM clock driver, we should change this
0193      * function to skip registration of xo factor clocks.
0194      */
0195
0196     return _qcom_cc_register_board_clk(dev, path, name, rate, add_factor);
0197 }
0198 EXPORT_SYMBOL_GPL(qcom_cc_register_board_clk);
0199
0200 int qcom_cc_register_sleep_clk(struct device *dev)
0201 {
0202     return _qcom_cc_register_board_clk(dev, "sleep_clk", "sleep_clk_src",
0203                        32768, true);
0204 }
0205 EXPORT_SYMBOL_GPL(qcom_cc_register_sleep_clk);
0206
0207 /* Drop 'protected-clocks' from the list of clocks to register */
0208 static void qcom_cc_drop_protected(struct device *dev, struct qcom_cc *cc)
0209 {
0210     struct device_node *np = dev->of_node;
0211     struct property *prop;
0212     const __be32 *p;
0213     u32 i;
0214
0215     of_property_for_each_u32(np, "protected-clocks", prop, p, i) {
0216         if (i >= cc->num_rclks)
0217             continue;
0218
0219         cc->rclks[i] = NULL;
0220     }
0221 }
0222
0223 static struct clk_hw *qcom_cc_clk_hw_get(struct of_phandle_args *clkspec,
0224                      void *data)
0225 {
0226     struct qcom_cc *cc = data;
0227     unsigned int idx = clkspec->args[0];
0228
0229     if (idx >= cc->num_rclks) {
0230         pr_err("%s: invalid index %u\n", __func__, idx);
0231         return ERR_PTR(-EINVAL);
0232     }
0233
0234     return cc->rclks[idx] ? &cc->rclks[idx]->hw : NULL;
0235 }
0236
0237 int qcom_cc_really_probe(struct platform_device *pdev,
0238              const struct qcom_cc_desc *desc, struct regmap *regmap)
0239 {
0240     int i, ret;
0241     struct device *dev = &pdev->dev;
0242     struct qcom_reset_controller *reset;
0243     struct qcom_cc *cc;
0244     struct gdsc_desc *scd;
0245     size_t num_clks = desc->num_clks;
0246     struct clk_regmap **rclks = desc->clks;
0247     size_t num_clk_hws = desc->num_clk_hws;
0248     struct clk_hw **clk_hws = desc->clk_hws;
0249
0250     cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
0251     if (!cc)
0252         return -ENOMEM;
0253
0254     reset = &cc->reset;
0255     reset->rcdev.of_node = dev->of_node;
0256     reset->rcdev.ops = &qcom_reset_ops;
0257     reset->rcdev.owner = dev->driver->owner;
0258     reset->rcdev.nr_resets = desc->num_resets;
0259     reset->regmap = regmap;
0260     reset->reset_map = desc->resets;
0261
0262     ret = devm_reset_controller_register(dev, &reset->rcdev);
0263     if (ret)
0264         return ret;
0265
0266     if (desc->gdscs && desc->num_gdscs) {
0267         scd = devm_kzalloc(dev, sizeof(*scd), GFP_KERNEL);
0268         if (!scd)
0269             return -ENOMEM;
0270         scd->dev = dev;
0271         scd->scs = desc->gdscs;
0272         scd->num = desc->num_gdscs;
0273         ret = gdsc_register(scd, &reset->rcdev, regmap);
0274         if (ret)
0275             return ret;
0276         ret = devm_add_action_or_reset(dev, qcom_cc_gdsc_unregister,
0277                            scd);
0278         if (ret)
0279             return ret;
0280     }
0281
0282     cc->rclks = rclks;
0283     cc->num_rclks = num_clks;
0284
0285     qcom_cc_drop_protected(dev, cc);
0286
0287     for (i = 0; i < num_clk_hws; i++) {
0288         ret = devm_clk_hw_register(dev, clk_hws[i]);
0289         if (ret)
0290             return ret;
0291     }
0292
0293     for (i = 0; i < num_clks; i++) {
0294         if (!rclks[i])
0295             continue;
0296
0297         ret = devm_clk_register_regmap(dev, rclks[i]);
0298         if (ret)
0299             return ret;
0300     }
0301
0302     ret = devm_of_clk_add_hw_provider(dev, qcom_cc_clk_hw_get, cc);
0303     if (ret)
0304         return ret;
0305
0306     return 0;
0307 }
0308 EXPORT_SYMBOL_GPL(qcom_cc_really_probe);
0309
0310 int qcom_cc_probe(struct platform_device *pdev, const struct qcom_cc_desc *desc)
0311 {
0312     struct regmap *regmap;
0313
0314     regmap = qcom_cc_map(pdev, desc);
0315     if (IS_ERR(regmap))
0316         return PTR_ERR(regmap);
0317
0318     return qcom_cc_really_probe(pdev, desc, regmap);
0319 }
0320 EXPORT_SYMBOL_GPL(qcom_cc_probe);
0321
0322 int qcom_cc_probe_by_index(struct platform_device *pdev, int index,
0323                const struct qcom_cc_desc *desc)
0324 {
0325     struct regmap *regmap;
0326     void __iomem *base;
0327
0328     base = devm_platform_ioremap_resource(pdev, index);
0329     if (IS_ERR(base))
0330         return -ENOMEM;
0331
0332     regmap = devm_regmap_init_mmio(&pdev->dev, base, desc->config);
0333     if (IS_ERR(regmap))
0334         return PTR_ERR(regmap);
0335
0336     return qcom_cc_really_probe(pdev, desc, regmap);
0337 }
0338 EXPORT_SYMBOL_GPL(qcom_cc_probe_by_index);
0339
0340 MODULE_LICENSE("GPL v2");