clk/qcom/clk-regmap-phy-mux.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2022, Linaro Ltd.
0004  */
0005
0006 #ifndef __QCOM_CLK_REGMAP_PHY_MUX_H__
0007 #define __QCOM_CLK_REGMAP_PHY_MUX_H__
0008
0009 #include "clk-regmap.h"
0010
0011 /*
0012  * A clock implementation for PHY pipe and symbols clock muxes.
0013  *
0014  * If the clock is running off the from-PHY source, report it as enabled.
0015  * Report it as disabled otherwise (if it uses reference source).
0016  *
0017  * This way the PHY will disable the pipe clock before turning off the GDSC,
0018  * which in turn would lead to disabling corresponding pipe_clk_src (and thus
0019  * it being parked to a safe, reference clock source). And vice versa, after
0020  * enabling the GDSC the PHY will enable the pipe clock, which would cause
0021  * pipe_clk_src to be switched from a safe source to the working one.
0022  *
0023  * For some platforms this should be used for the UFS symbol_clk_src clocks
0024  * too.
0025  */
0026 struct clk_regmap_phy_mux {
0027     u32         reg;
0028     struct clk_regmap   clkr;
0029 };
0030
0031 extern const struct clk_ops clk_regmap_phy_mux_ops;
0032
0033 #endif