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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Copyright (c) 2013, The Linux Foundation. All rights reserved. */
0003 
0004 #ifndef __QCOM_CLK_BRANCH_H__
0005 #define __QCOM_CLK_BRANCH_H__
0006 
0007 #include <linux/clk-provider.h>
0008 
0009 #include "clk-regmap.h"
0010 
0011 /**
0012  * struct clk_branch - gating clock with status bit and dynamic hardware gating
0013  *
0014  * @hwcg_reg: dynamic hardware clock gating register
0015  * @hwcg_bit: ORed with @hwcg_reg to enable dynamic hardware clock gating
0016  * @halt_reg: halt register
0017  * @halt_bit: ANDed with @halt_reg to test for clock halted
0018  * @halt_check: type of halt checking to perform
0019  * @clkr: handle between common and hardware-specific interfaces
0020  *
0021  * Clock which can gate its output.
0022  */
0023 struct clk_branch {
0024     u32 hwcg_reg;
0025     u32 halt_reg;
0026     u8  hwcg_bit;
0027     u8  halt_bit;
0028     u8  halt_check;
0029 #define BRANCH_VOTED            BIT(7) /* Delay on disable */
0030 #define BRANCH_HALT         0 /* pol: 1 = halt */
0031 #define BRANCH_HALT_VOTED       (BRANCH_HALT | BRANCH_VOTED)
0032 #define BRANCH_HALT_ENABLE      1 /* pol: 0 = halt */
0033 #define BRANCH_HALT_ENABLE_VOTED    (BRANCH_HALT_ENABLE | BRANCH_VOTED)
0034 #define BRANCH_HALT_DELAY       2 /* No bit to check; just delay */
0035 #define BRANCH_HALT_SKIP        3 /* Don't check halt bit */
0036 
0037     struct clk_regmap clkr;
0038 };
0039 
0040 extern const struct clk_ops clk_branch_ops;
0041 extern const struct clk_ops clk_branch2_ops;
0042 extern const struct clk_ops clk_branch_simple_ops;
0043 extern const struct clk_ops clk_branch2_aon_ops;
0044 
0045 #define to_clk_branch(_hw) \
0046     container_of(to_clk_regmap(_hw), struct clk_branch, clkr)
0047 
0048 #endif