clk/meson/clk-pll.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (c) 2019 BayLibre, SAS.
0004  * Author: Jerome Brunet <jbrunet@baylibre.com>
0005  */
0006
0007 #ifndef __MESON_CLK_PLL_H
0008 #define __MESON_CLK_PLL_H
0009
0010 #include <linux/clk-provider.h>
0011 #include <linux/regmap.h>
0012 #include "parm.h"
0013
0014 struct pll_params_table {
0015     unsigned int    m;
0016     unsigned int    n;
0017 };
0018
0019 struct pll_mult_range {
0020     unsigned int    min;
0021     unsigned int    max;
0022 };
0023
0024 #define PLL_PARAMS(_m, _n)                      \
0025     {                               \
0026         .m      = (_m),                 \
0027         .n      = (_n),                 \
0028     }
0029
0030 #define CLK_MESON_PLL_ROUND_CLOSEST BIT(0)
0031
0032 struct meson_clk_pll_data {
0033     struct parm en;
0034     struct parm m;
0035     struct parm n;
0036     struct parm frac;
0037     struct parm l;
0038     struct parm rst;
0039     const struct reg_sequence *init_regs;
0040     unsigned int init_count;
0041     const struct pll_params_table *table;
0042     const struct pll_mult_range *range;
0043     u8 flags;
0044 };
0045
0046 extern const struct clk_ops meson_clk_pll_ro_ops;
0047 extern const struct clk_ops meson_clk_pll_ops;
0048 extern const struct clk_ops meson_clk_pcie_pll_ops;
0049
0050 #endif /* __MESON_CLK_PLL_H */