clk/mediatek/clk-mt8195-venc.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 //
0003 // Copyright (c) 2021 MediaTek Inc.
0004 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
0005
0006 #include "clk-gate.h"
0007 #include "clk-mtk.h"
0008
0009 #include <dt-bindings/clock/mt8195-clk.h>
0010 #include <linux/clk-provider.h>
0011 #include <linux/platform_device.h>
0012
0013 static const struct mtk_gate_regs venc_cg_regs = {
0014     .set_ofs = 0x4,
0015     .clr_ofs = 0x8,
0016     .sta_ofs = 0x0,
0017 };
0018
0019 #define GATE_VENC(_id, _name, _parent, _shift)          \
0020     GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
0021
0022 static const struct mtk_gate venc_clks[] = {
0023     GATE_VENC(CLK_VENC_LARB, "venc_larb", "top_venc", 0),
0024     GATE_VENC(CLK_VENC_VENC, "venc_venc", "top_venc", 4),
0025     GATE_VENC(CLK_VENC_JPGENC, "venc_jpgenc", "top_venc", 8),
0026     GATE_VENC(CLK_VENC_JPGDEC, "venc_jpgdec", "top_venc", 12),
0027     GATE_VENC(CLK_VENC_JPGDEC_C1, "venc_jpgdec_c1", "top_venc", 16),
0028     GATE_VENC(CLK_VENC_GALS, "venc_gals", "top_venc", 28),
0029 };
0030
0031 static const struct mtk_gate venc_core1_clks[] = {
0032     GATE_VENC(CLK_VENC_CORE1_LARB, "venc_core1_larb", "top_venc", 0),
0033     GATE_VENC(CLK_VENC_CORE1_VENC, "venc_core1_venc", "top_venc", 4),
0034     GATE_VENC(CLK_VENC_CORE1_JPGENC, "venc_core1_jpgenc", "top_venc", 8),
0035     GATE_VENC(CLK_VENC_CORE1_JPGDEC, "venc_core1_jpgdec", "top_venc", 12),
0036     GATE_VENC(CLK_VENC_CORE1_JPGDEC_C1, "venc_core1_jpgdec_c1", "top_venc", 16),
0037     GATE_VENC(CLK_VENC_CORE1_GALS, "venc_core1_gals", "top_venc", 28),
0038 };
0039
0040 static const struct mtk_clk_desc venc_desc = {
0041     .clks = venc_clks,
0042     .num_clks = ARRAY_SIZE(venc_clks),
0043 };
0044
0045 static const struct mtk_clk_desc venc_core1_desc = {
0046     .clks = venc_core1_clks,
0047     .num_clks = ARRAY_SIZE(venc_core1_clks),
0048 };
0049
0050 static const struct of_device_id of_match_clk_mt8195_venc[] = {
0051     {
0052         .compatible = "mediatek,mt8195-vencsys",
0053         .data = &venc_desc,
0054     }, {
0055         .compatible = "mediatek,mt8195-vencsys_core1",
0056         .data = &venc_core1_desc,
0057     }, {
0058         /* sentinel */
0059     }
0060 };
0061
0062 static struct platform_driver clk_mt8195_venc_drv = {
0063     .probe = mtk_clk_simple_probe,
0064     .remove = mtk_clk_simple_remove,
0065     .driver = {
0066         .name = "clk-mt8195-venc",
0067         .of_match_table = of_match_clk_mt8195_venc,
0068     },
0069 };
0070 builtin_platform_driver(clk_mt8195_venc_drv);