clk/mediatek/clk-mt8195-mfg.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 //
0003 // Copyright (c) 2021 MediaTek Inc.
0004 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
0005
0006 #include "clk-gate.h"
0007 #include "clk-mtk.h"
0008
0009 #include <dt-bindings/clock/mt8195-clk.h>
0010 #include <linux/clk-provider.h>
0011 #include <linux/platform_device.h>
0012
0013 static const struct mtk_gate_regs mfg_cg_regs = {
0014     .set_ofs = 0x4,
0015     .clr_ofs = 0x8,
0016     .sta_ofs = 0x0,
0017 };
0018
0019 #define GATE_MFG(_id, _name, _parent, _shift)           \
0020     GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
0021
0022 static const struct mtk_gate mfg_clks[] = {
0023     GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "top_mfg_core_tmp", 0),
0024 };
0025
0026 static const struct mtk_clk_desc mfg_desc = {
0027     .clks = mfg_clks,
0028     .num_clks = ARRAY_SIZE(mfg_clks),
0029 };
0030
0031 static const struct of_device_id of_match_clk_mt8195_mfg[] = {
0032     {
0033         .compatible = "mediatek,mt8195-mfgcfg",
0034         .data = &mfg_desc,
0035     }, {
0036         /* sentinel */
0037     }
0038 };
0039
0040 static struct platform_driver clk_mt8195_mfg_drv = {
0041     .probe = mtk_clk_simple_probe,
0042     .remove = mtk_clk_simple_remove,
0043     .driver = {
0044         .name = "clk-mt8195-mfg",
0045         .of_match_table = of_match_clk_mt8195_mfg,
0046     },
0047 };
0048 builtin_platform_driver(clk_mt8195_mfg_drv);