clk/mediatek/clk-mt8195-cam.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 //
0003 // Copyright (c) 2021 MediaTek Inc.
0004 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
0005
0006 #include "clk-gate.h"
0007 #include "clk-mtk.h"
0008
0009 #include <dt-bindings/clock/mt8195-clk.h>
0010 #include <linux/clk-provider.h>
0011 #include <linux/platform_device.h>
0012
0013 static const struct mtk_gate_regs cam_cg_regs = {
0014     .set_ofs = 0x4,
0015     .clr_ofs = 0x8,
0016     .sta_ofs = 0x0,
0017 };
0018
0019 #define GATE_CAM(_id, _name, _parent, _shift)           \
0020     GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
0021
0022 static const struct mtk_gate cam_clks[] = {
0023     GATE_CAM(CLK_CAM_LARB13, "cam_larb13", "top_cam", 0),
0024     GATE_CAM(CLK_CAM_LARB14, "cam_larb14", "top_cam", 1),
0025     GATE_CAM(CLK_CAM_MAIN_CAM, "cam_main_cam", "top_cam", 3),
0026     GATE_CAM(CLK_CAM_MAIN_CAMTG, "cam_main_camtg", "top_cam", 4),
0027     GATE_CAM(CLK_CAM_SENINF, "cam_seninf", "top_cam", 5),
0028     GATE_CAM(CLK_CAM_GCAMSVA, "cam_gcamsva", "top_cam", 6),
0029     GATE_CAM(CLK_CAM_GCAMSVB, "cam_gcamsvb", "top_cam", 7),
0030     GATE_CAM(CLK_CAM_GCAMSVC, "cam_gcamsvc", "top_cam", 8),
0031     GATE_CAM(CLK_CAM_SCAMSA, "cam_scamsa", "top_cam", 9),
0032     GATE_CAM(CLK_CAM_SCAMSB, "cam_scamsb", "top_cam", 10),
0033     GATE_CAM(CLK_CAM_CAMSV_TOP, "cam_camsv_top", "top_cam", 11),
0034     GATE_CAM(CLK_CAM_CAMSV_CQ, "cam_camsv_cq", "top_cam", 12),
0035     GATE_CAM(CLK_CAM_ADL, "cam_adl", "top_cam", 16),
0036     GATE_CAM(CLK_CAM_ASG, "cam_asg", "top_cam", 17),
0037     GATE_CAM(CLK_CAM_PDA, "cam_pda", "top_cam", 18),
0038     GATE_CAM(CLK_CAM_FAKE_ENG, "cam_fake_eng", "top_cam", 19),
0039     GATE_CAM(CLK_CAM_MAIN_MRAW0, "cam_main_mraw0", "top_cam", 20),
0040     GATE_CAM(CLK_CAM_MAIN_MRAW1, "cam_main_mraw1", "top_cam", 21),
0041     GATE_CAM(CLK_CAM_MAIN_MRAW2, "cam_main_mraw2", "top_cam", 22),
0042     GATE_CAM(CLK_CAM_MAIN_MRAW3, "cam_main_mraw3", "top_cam", 23),
0043     GATE_CAM(CLK_CAM_CAM2MM0_GALS, "cam_cam2mm0_gals", "top_cam", 24),
0044     GATE_CAM(CLK_CAM_CAM2MM1_GALS, "cam_cam2mm1_gals", "top_cam", 25),
0045     GATE_CAM(CLK_CAM_CAM2SYS_GALS, "cam_cam2sys_gals", "top_cam", 26),
0046 };
0047
0048 static const struct mtk_gate cam_mraw_clks[] = {
0049     GATE_CAM(CLK_CAM_MRAW_LARBX, "cam_mraw_larbx", "top_cam", 0),
0050     GATE_CAM(CLK_CAM_MRAW_CAMTG, "cam_mraw_camtg", "top_cam", 2),
0051     GATE_CAM(CLK_CAM_MRAW_MRAW0, "cam_mraw_mraw0", "top_cam", 3),
0052     GATE_CAM(CLK_CAM_MRAW_MRAW1, "cam_mraw_mraw1", "top_cam", 4),
0053     GATE_CAM(CLK_CAM_MRAW_MRAW2, "cam_mraw_mraw2", "top_cam", 5),
0054     GATE_CAM(CLK_CAM_MRAW_MRAW3, "cam_mraw_mraw3", "top_cam", 6),
0055 };
0056
0057 static const struct mtk_gate cam_rawa_clks[] = {
0058     GATE_CAM(CLK_CAM_RAWA_LARBX, "cam_rawa_larbx", "top_cam", 0),
0059     GATE_CAM(CLK_CAM_RAWA_CAM, "cam_rawa_cam", "top_cam", 1),
0060     GATE_CAM(CLK_CAM_RAWA_CAMTG, "cam_rawa_camtg", "top_cam", 2),
0061 };
0062
0063 static const struct mtk_gate cam_rawb_clks[] = {
0064     GATE_CAM(CLK_CAM_RAWB_LARBX, "cam_rawb_larbx", "top_cam", 0),
0065     GATE_CAM(CLK_CAM_RAWB_CAM, "cam_rawb_cam", "top_cam", 1),
0066     GATE_CAM(CLK_CAM_RAWB_CAMTG, "cam_rawb_camtg", "top_cam", 2),
0067 };
0068
0069 static const struct mtk_gate cam_yuva_clks[] = {
0070     GATE_CAM(CLK_CAM_YUVA_LARBX, "cam_yuva_larbx", "top_cam", 0),
0071     GATE_CAM(CLK_CAM_YUVA_CAM, "cam_yuva_cam", "top_cam", 1),
0072     GATE_CAM(CLK_CAM_YUVA_CAMTG, "cam_yuva_camtg", "top_cam", 2),
0073 };
0074
0075 static const struct mtk_gate cam_yuvb_clks[] = {
0076     GATE_CAM(CLK_CAM_YUVB_LARBX, "cam_yuvb_larbx", "top_cam", 0),
0077     GATE_CAM(CLK_CAM_YUVB_CAM, "cam_yuvb_cam", "top_cam", 1),
0078     GATE_CAM(CLK_CAM_YUVB_CAMTG, "cam_yuvb_camtg", "top_cam", 2),
0079 };
0080
0081 static const struct mtk_clk_desc cam_desc = {
0082     .clks = cam_clks,
0083     .num_clks = ARRAY_SIZE(cam_clks),
0084 };
0085
0086 static const struct mtk_clk_desc cam_mraw_desc = {
0087     .clks = cam_mraw_clks,
0088     .num_clks = ARRAY_SIZE(cam_mraw_clks),
0089 };
0090
0091 static const struct mtk_clk_desc cam_rawa_desc = {
0092     .clks = cam_rawa_clks,
0093     .num_clks = ARRAY_SIZE(cam_rawa_clks),
0094 };
0095
0096 static const struct mtk_clk_desc cam_rawb_desc = {
0097     .clks = cam_rawb_clks,
0098     .num_clks = ARRAY_SIZE(cam_rawb_clks),
0099 };
0100
0101 static const struct mtk_clk_desc cam_yuva_desc = {
0102     .clks = cam_yuva_clks,
0103     .num_clks = ARRAY_SIZE(cam_yuva_clks),
0104 };
0105
0106 static const struct mtk_clk_desc cam_yuvb_desc = {
0107     .clks = cam_yuvb_clks,
0108     .num_clks = ARRAY_SIZE(cam_yuvb_clks),
0109 };
0110
0111 static const struct of_device_id of_match_clk_mt8195_cam[] = {
0112     {
0113         .compatible = "mediatek,mt8195-camsys",
0114         .data = &cam_desc,
0115     }, {
0116         .compatible = "mediatek,mt8195-camsys_mraw",
0117         .data = &cam_mraw_desc,
0118     }, {
0119         .compatible = "mediatek,mt8195-camsys_rawa",
0120         .data = &cam_rawa_desc,
0121     }, {
0122         .compatible = "mediatek,mt8195-camsys_rawb",
0123         .data = &cam_rawb_desc,
0124     }, {
0125         .compatible = "mediatek,mt8195-camsys_yuva",
0126         .data = &cam_yuva_desc,
0127     }, {
0128         .compatible = "mediatek,mt8195-camsys_yuvb",
0129         .data = &cam_yuvb_desc,
0130     }, {
0131         /* sentinel */
0132     }
0133 };
0134
0135 static struct platform_driver clk_mt8195_cam_drv = {
0136     .probe = mtk_clk_simple_probe,
0137     .remove = mtk_clk_simple_remove,
0138     .driver = {
0139         .name = "clk-mt8195-cam",
0140         .of_match_table = of_match_clk_mt8195_cam,
0141     },
0142 };
0143 builtin_platform_driver(clk_mt8195_cam_drv);