clk/mediatek/clk-mt8192-scp_adsp.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 //
0003 // Copyright (c) 2021 MediaTek Inc.
0004 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
0005
0006 #include <linux/clk-provider.h>
0007 #include <linux/of_device.h>
0008 #include <linux/platform_device.h>
0009
0010 #include "clk-mtk.h"
0011 #include "clk-gate.h"
0012
0013 #include <dt-bindings/clock/mt8192-clk.h>
0014
0015 static const struct mtk_gate_regs scp_adsp_cg_regs = {
0016     .set_ofs = 0x180,
0017     .clr_ofs = 0x180,
0018     .sta_ofs = 0x180,
0019 };
0020
0021 #define GATE_SCP_ADSP(_id, _name, _parent, _shift)  \
0022     GATE_MTK(_id, _name, _parent, &scp_adsp_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
0023
0024 static const struct mtk_gate scp_adsp_clks[] = {
0025     GATE_SCP_ADSP(CLK_SCP_ADSP_AUDIODSP, "scp_adsp_audiodsp", "adsp_sel", 0),
0026 };
0027
0028 static const struct mtk_clk_desc scp_adsp_desc = {
0029     .clks = scp_adsp_clks,
0030     .num_clks = ARRAY_SIZE(scp_adsp_clks),
0031 };
0032
0033 static const struct of_device_id of_match_clk_mt8192_scp_adsp[] = {
0034     {
0035         .compatible = "mediatek,mt8192-scp_adsp",
0036         .data = &scp_adsp_desc,
0037     }, {
0038         /* sentinel */
0039     }
0040 };
0041
0042 static struct platform_driver clk_mt8192_scp_adsp_drv = {
0043     .probe = mtk_clk_simple_probe,
0044     .driver = {
0045         .name = "clk-mt8192-scp_adsp",
0046         .of_match_table = of_match_clk_mt8192_scp_adsp,
0047     },
0048 };
0049
0050 builtin_platform_driver(clk_mt8192_scp_adsp_drv);