clk/mediatek/clk-mt8186-cam.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 //
0003 // Copyright (c) 2022 MediaTek Inc.
0004 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
0005
0006 #include <linux/clk-provider.h>
0007 #include <linux/platform_device.h>
0008 #include <dt-bindings/clock/mt8186-clk.h>
0009
0010 #include "clk-gate.h"
0011 #include "clk-mtk.h"
0012
0013 static const struct mtk_gate_regs cam_cg_regs = {
0014     .set_ofs = 0x4,
0015     .clr_ofs = 0x8,
0016     .sta_ofs = 0x0,
0017 };
0018
0019 #define GATE_CAM(_id, _name, _parent, _shift)           \
0020     GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
0021
0022 static const struct mtk_gate cam_clks[] = {
0023     GATE_CAM(CLK_CAM_LARB13, "cam_larb13", "top_cam", 0),
0024     GATE_CAM(CLK_CAM_DFP_VAD, "cam_dfp_vad", "top_cam", 1),
0025     GATE_CAM(CLK_CAM_LARB14, "cam_larb14", "top_cam", 2),
0026     GATE_CAM(CLK_CAM, "cam", "top_cam", 6),
0027     GATE_CAM(CLK_CAMTG, "camtg", "top_cam", 7),
0028     GATE_CAM(CLK_CAM_SENINF, "cam_seninf", "top_cam", 8),
0029     GATE_CAM(CLK_CAMSV1, "camsv1", "top_cam", 10),
0030     GATE_CAM(CLK_CAMSV2, "camsv2", "top_cam", 11),
0031     GATE_CAM(CLK_CAMSV3, "camsv3", "top_cam", 12),
0032     GATE_CAM(CLK_CAM_CCU0, "cam_ccu0", "top_cam", 13),
0033     GATE_CAM(CLK_CAM_CCU1, "cam_ccu1", "top_cam", 14),
0034     GATE_CAM(CLK_CAM_MRAW0, "cam_mraw0", "top_cam", 15),
0035     GATE_CAM(CLK_CAM_FAKE_ENG, "cam_fake_eng", "top_cam", 17),
0036     GATE_CAM(CLK_CAM_CCU_GALS, "cam_ccu_gals", "top_cam", 18),
0037     GATE_CAM(CLK_CAM2MM_GALS, "cam2mm_gals", "top_cam", 19),
0038 };
0039
0040 static const struct mtk_gate cam_rawa_clks[] = {
0041     GATE_CAM(CLK_CAM_RAWA_LARBX_RAWA, "cam_rawa_larbx_rawa", "top_cam", 0),
0042     GATE_CAM(CLK_CAM_RAWA, "cam_rawa", "top_cam", 1),
0043     GATE_CAM(CLK_CAM_RAWA_CAMTG_RAWA, "cam_rawa_camtg_rawa", "top_cam", 2),
0044 };
0045
0046 static const struct mtk_gate cam_rawb_clks[] = {
0047     GATE_CAM(CLK_CAM_RAWB_LARBX_RAWB, "cam_rawb_larbx_rawb", "top_cam", 0),
0048     GATE_CAM(CLK_CAM_RAWB, "cam_rawb", "top_cam", 1),
0049     GATE_CAM(CLK_CAM_RAWB_CAMTG_RAWB, "cam_rawb_camtg_rawb", "top_cam", 2),
0050 };
0051
0052 static const struct mtk_clk_desc cam_desc = {
0053     .clks = cam_clks,
0054     .num_clks = ARRAY_SIZE(cam_clks),
0055 };
0056
0057 static const struct mtk_clk_desc cam_rawa_desc = {
0058     .clks = cam_rawa_clks,
0059     .num_clks = ARRAY_SIZE(cam_rawa_clks),
0060 };
0061
0062 static const struct mtk_clk_desc cam_rawb_desc = {
0063     .clks = cam_rawb_clks,
0064     .num_clks = ARRAY_SIZE(cam_rawb_clks),
0065 };
0066
0067 static const struct of_device_id of_match_clk_mt8186_cam[] = {
0068     {
0069         .compatible = "mediatek,mt8186-camsys",
0070         .data = &cam_desc,
0071     }, {
0072         .compatible = "mediatek,mt8186-camsys_rawa",
0073         .data = &cam_rawa_desc,
0074     }, {
0075         .compatible = "mediatek,mt8186-camsys_rawb",
0076         .data = &cam_rawb_desc,
0077     }, {
0078         /* sentinel */
0079     }
0080 };
0081
0082 static struct platform_driver clk_mt8186_cam_drv = {
0083     .probe = mtk_clk_simple_probe,
0084     .remove = mtk_clk_simple_remove,
0085     .driver = {
0086         .name = "clk-mt8186-cam",
0087         .of_match_table = of_match_clk_mt8186_cam,
0088     },
0089 };
0090 builtin_platform_driver(clk_mt8186_cam_drv);