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0007 #include <linux/module.h>
0008 #include <linux/clk-provider.h>
0009 #include <linux/platform_device.h>
0010 #include <dt-bindings/clock/mt6779-clk.h>
0011
0012 #include "clk-mtk.h"
0013 #include "clk-gate.h"
0014
0015 static const struct mtk_gate_regs ipe_cg_regs = {
0016 .set_ofs = 0x0004,
0017 .clr_ofs = 0x0008,
0018 .sta_ofs = 0x0000,
0019 };
0020
0021 #define GATE_IPE(_id, _name, _parent, _shift) \
0022 GATE_MTK(_id, _name, _parent, &ipe_cg_regs, _shift, \
0023 &mtk_clk_gate_ops_setclr)
0024
0025 static const struct mtk_gate ipe_clks[] = {
0026 GATE_IPE(CLK_IPE_LARB7, "ipe_larb7", "ipe_sel", 0),
0027 GATE_IPE(CLK_IPE_LARB8, "ipe_larb8", "ipe_sel", 1),
0028 GATE_IPE(CLK_IPE_SMI_SUBCOM, "ipe_smi_subcom", "ipe_sel", 2),
0029 GATE_IPE(CLK_IPE_FD, "ipe_fd", "ipe_sel", 3),
0030 GATE_IPE(CLK_IPE_FE, "ipe_fe", "ipe_sel", 4),
0031 GATE_IPE(CLK_IPE_RSC, "ipe_rsc", "ipe_sel", 5),
0032 GATE_IPE(CLK_IPE_DPE, "ipe_dpe", "ipe_sel", 6),
0033 };
0034
0035 static const struct of_device_id of_match_clk_mt6779_ipe[] = {
0036 { .compatible = "mediatek,mt6779-ipesys", },
0037 {}
0038 };
0039
0040 static int clk_mt6779_ipe_probe(struct platform_device *pdev)
0041 {
0042 struct clk_hw_onecell_data *clk_data;
0043 struct device_node *node = pdev->dev.of_node;
0044
0045 clk_data = mtk_alloc_clk_data(CLK_IPE_NR_CLK);
0046
0047 mtk_clk_register_gates(node, ipe_clks, ARRAY_SIZE(ipe_clks),
0048 clk_data);
0049
0050 return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
0051 }
0052
0053 static struct platform_driver clk_mt6779_ipe_drv = {
0054 .probe = clk_mt6779_ipe_probe,
0055 .driver = {
0056 .name = "clk-mt6779-ipe",
0057 .of_match_table = of_match_clk_mt6779_ipe,
0058 },
0059 };
0060
0061 module_platform_driver(clk_mt6779_ipe_drv);
0062 MODULE_LICENSE("GPL");