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0007 #include <linux/module.h>
0008 #include <linux/clk-provider.h>
0009 #include <linux/platform_device.h>
0010 #include <dt-bindings/clock/mt6779-clk.h>
0011
0012 #include "clk-mtk.h"
0013 #include "clk-gate.h"
0014
0015 static const struct mtk_gate_regs img_cg_regs = {
0016 .set_ofs = 0x0004,
0017 .clr_ofs = 0x0008,
0018 .sta_ofs = 0x0000,
0019 };
0020
0021 #define GATE_IMG(_id, _name, _parent, _shift) \
0022 GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, \
0023 &mtk_clk_gate_ops_setclr)
0024
0025 static const struct mtk_gate img_clks[] = {
0026 GATE_IMG(CLK_IMG_LARB5, "imgsys_larb5", "img_sel", 0),
0027 GATE_IMG(CLK_IMG_LARB6, "imgsys_larb6", "img_sel", 1),
0028 GATE_IMG(CLK_IMG_DIP, "imgsys_dip", "img_sel", 2),
0029 GATE_IMG(CLK_IMG_MFB, "imgsys_mfb", "img_sel", 6),
0030 GATE_IMG(CLK_IMG_WPE_A, "imgsys_wpe_a", "img_sel", 7),
0031 };
0032
0033 static const struct of_device_id of_match_clk_mt6779_img[] = {
0034 { .compatible = "mediatek,mt6779-imgsys", },
0035 {}
0036 };
0037
0038 static int clk_mt6779_img_probe(struct platform_device *pdev)
0039 {
0040 struct clk_hw_onecell_data *clk_data;
0041 struct device_node *node = pdev->dev.of_node;
0042
0043 clk_data = mtk_alloc_clk_data(CLK_IMG_NR_CLK);
0044
0045 mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks),
0046 clk_data);
0047
0048 return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
0049 }
0050
0051 static struct platform_driver clk_mt6779_img_drv = {
0052 .probe = clk_mt6779_img_probe,
0053 .driver = {
0054 .name = "clk-mt6779-img",
0055 .of_match_table = of_match_clk_mt6779_img,
0056 },
0057 };
0058
0059 module_platform_driver(clk_mt6779_img_drv);
0060 MODULE_LICENSE("GPL");