clk/mediatek/clk-mt6779-aud.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (c) 2019 MediaTek Inc.
0004  * Author: Wendell Lin <wendell.lin@mediatek.com>
0005  */
0006
0007 #include <linux/module.h>
0008 #include <linux/clk-provider.h>
0009 #include <linux/of.h>
0010 #include <linux/of_address.h>
0011 #include <linux/of_device.h>
0012 #include <linux/platform_device.h>
0013
0014 #include "clk-mtk.h"
0015 #include "clk-gate.h"
0016
0017 #include <dt-bindings/clock/mt6779-clk.h>
0018
0019 static const struct mtk_gate_regs audio0_cg_regs = {
0020     .set_ofs = 0x0,
0021     .clr_ofs = 0x0,
0022     .sta_ofs = 0x0,
0023 };
0024
0025 static const struct mtk_gate_regs audio1_cg_regs = {
0026     .set_ofs = 0x4,
0027     .clr_ofs = 0x4,
0028     .sta_ofs = 0x4,
0029 };
0030
0031 #define GATE_AUDIO0(_id, _name, _parent, _shift)        \
0032     GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift,  \
0033         &mtk_clk_gate_ops_no_setclr)
0034 #define GATE_AUDIO1(_id, _name, _parent, _shift)        \
0035     GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift,  \
0036         &mtk_clk_gate_ops_no_setclr)
0037
0038 static const struct mtk_gate audio_clks[] = {
0039     /* AUDIO0 */
0040     GATE_AUDIO0(CLK_AUD_AFE, "aud_afe", "audio_sel", 2),
0041     GATE_AUDIO0(CLK_AUD_22M, "aud_22m", "aud_eng1_sel", 8),
0042     GATE_AUDIO0(CLK_AUD_24M, "aud_24m", "aud_eng2_sel", 9),
0043     GATE_AUDIO0(CLK_AUD_APLL2_TUNER, "aud_apll2_tuner",
0044             "aud_eng2_sel", 18),
0045     GATE_AUDIO0(CLK_AUD_APLL_TUNER, "aud_apll_tuner",
0046             "aud_eng1_sel", 19),
0047     GATE_AUDIO0(CLK_AUD_TDM, "aud_tdm", "aud_eng1_sel", 20),
0048     GATE_AUDIO0(CLK_AUD_ADC, "aud_adc", "audio_sel", 24),
0049     GATE_AUDIO0(CLK_AUD_DAC, "aud_dac", "audio_sel", 25),
0050     GATE_AUDIO0(CLK_AUD_DAC_PREDIS, "aud_dac_predis",
0051             "audio_sel", 26),
0052     GATE_AUDIO0(CLK_AUD_TML, "aud_tml", "audio_sel", 27),
0053     GATE_AUDIO0(CLK_AUD_NLE, "aud_nle", "audio_sel", 28),
0054     /* AUDIO1 */
0055     GATE_AUDIO1(CLK_AUD_I2S1_BCLK_SW, "aud_i2s1_bclk",
0056             "audio_sel", 4),
0057     GATE_AUDIO1(CLK_AUD_I2S2_BCLK_SW, "aud_i2s2_bclk",
0058             "audio_sel", 5),
0059     GATE_AUDIO1(CLK_AUD_I2S3_BCLK_SW, "aud_i2s3_bclk",
0060             "audio_sel", 6),
0061     GATE_AUDIO1(CLK_AUD_I2S4_BCLK_SW, "aud_i2s4_bclk",
0062             "audio_sel", 7),
0063     GATE_AUDIO1(CLK_AUD_I2S5_BCLK_SW, "aud_i2s5_bclk",
0064             "audio_sel", 8),
0065     GATE_AUDIO1(CLK_AUD_CONN_I2S_ASRC, "aud_conn_i2s",
0066             "audio_sel", 12),
0067     GATE_AUDIO1(CLK_AUD_GENERAL1_ASRC, "aud_general1",
0068             "audio_sel", 13),
0069     GATE_AUDIO1(CLK_AUD_GENERAL2_ASRC, "aud_general2",
0070             "audio_sel", 14),
0071     GATE_AUDIO1(CLK_AUD_DAC_HIRES, "aud_dac_hires",
0072             "audio_h_sel", 15),
0073     GATE_AUDIO1(CLK_AUD_ADC_HIRES, "aud_adc_hires",
0074             "audio_h_sel", 16),
0075     GATE_AUDIO1(CLK_AUD_ADC_HIRES_TML, "aud_adc_hires_tml",
0076             "audio_h_sel", 17),
0077     GATE_AUDIO1(CLK_AUD_PDN_ADDA6_ADC, "aud_pdn_adda6_adc",
0078             "audio_sel", 20),
0079     GATE_AUDIO1(CLK_AUD_ADDA6_ADC_HIRES, "aud_adda6_adc_hires",
0080             "audio_h_sel",
0081             21),
0082     GATE_AUDIO1(CLK_AUD_3RD_DAC, "aud_3rd_dac", "audio_sel",
0083             28),
0084     GATE_AUDIO1(CLK_AUD_3RD_DAC_PREDIS, "aud_3rd_dac_predis",
0085             "audio_sel", 29),
0086     GATE_AUDIO1(CLK_AUD_3RD_DAC_TML, "aud_3rd_dac_tml",
0087             "audio_sel", 30),
0088     GATE_AUDIO1(CLK_AUD_3RD_DAC_HIRES, "aud_3rd_dac_hires",
0089             "audio_h_sel", 31),
0090 };
0091
0092 static const struct of_device_id of_match_clk_mt6779_aud[] = {
0093     { .compatible = "mediatek,mt6779-audio", },
0094     {}
0095 };
0096
0097 static int clk_mt6779_aud_probe(struct platform_device *pdev)
0098 {
0099     struct clk_hw_onecell_data *clk_data;
0100     struct device_node *node = pdev->dev.of_node;
0101
0102     clk_data = mtk_alloc_clk_data(CLK_AUD_NR_CLK);
0103
0104     mtk_clk_register_gates(node, audio_clks, ARRAY_SIZE(audio_clks),
0105                    clk_data);
0106
0107     return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
0108 }
0109
0110 static struct platform_driver clk_mt6779_aud_drv = {
0111     .probe = clk_mt6779_aud_probe,
0112     .driver = {
0113         .name = "clk-mt6779-aud",
0114         .of_match_table = of_match_clk_mt6779_aud,
0115     },
0116 };
0117
0118 module_platform_driver(clk_mt6779_aud_drv);
0119 MODULE_LICENSE("GPL");