clk/mediatek/clk-mt2701-vdec.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2014 MediaTek Inc.
0004  * Author: Shunli Wang <shunli.wang@mediatek.com>
0005  */
0006
0007 #include <linux/clk-provider.h>
0008 #include <linux/platform_device.h>
0009
0010 #include "clk-mtk.h"
0011 #include "clk-gate.h"
0012
0013 #include <dt-bindings/clock/mt2701-clk.h>
0014
0015 static const struct mtk_gate_regs vdec0_cg_regs = {
0016     .set_ofs = 0x0000,
0017     .clr_ofs = 0x0004,
0018     .sta_ofs = 0x0000,
0019 };
0020
0021 static const struct mtk_gate_regs vdec1_cg_regs = {
0022     .set_ofs = 0x0008,
0023     .clr_ofs = 0x000c,
0024     .sta_ofs = 0x0008,
0025 };
0026
0027 #define GATE_VDEC0(_id, _name, _parent, _shift) {   \
0028         .id = _id,              \
0029         .name = _name,              \
0030         .parent_name = _parent,         \
0031         .regs = &vdec0_cg_regs,         \
0032         .shift = _shift,            \
0033         .ops = &mtk_clk_gate_ops_setclr_inv,    \
0034     }
0035
0036 #define GATE_VDEC1(_id, _name, _parent, _shift) {   \
0037         .id = _id,              \
0038         .name = _name,              \
0039         .parent_name = _parent,         \
0040         .regs = &vdec1_cg_regs,         \
0041         .shift = _shift,            \
0042         .ops = &mtk_clk_gate_ops_setclr_inv,    \
0043     }
0044
0045 static const struct mtk_gate vdec_clks[] = {
0046     GATE_VDEC0(CLK_VDEC_CKGEN, "vdec_cken", "vdec_sel", 0),
0047     GATE_VDEC1(CLK_VDEC_LARB, "vdec_larb_cken", "mm_sel", 0),
0048 };
0049
0050 static const struct of_device_id of_match_clk_mt2701_vdec[] = {
0051     { .compatible = "mediatek,mt2701-vdecsys", },
0052     {}
0053 };
0054
0055 static int clk_mt2701_vdec_probe(struct platform_device *pdev)
0056 {
0057     struct clk_hw_onecell_data *clk_data;
0058     int r;
0059     struct device_node *node = pdev->dev.of_node;
0060
0061     clk_data = mtk_alloc_clk_data(CLK_VDEC_NR);
0062
0063     mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks),
0064                         clk_data);
0065
0066     r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
0067     if (r)
0068         dev_err(&pdev->dev,
0069             "could not register clock provider: %s: %d\n",
0070             pdev->name, r);
0071
0072     return r;
0073 }
0074
0075 static struct platform_driver clk_mt2701_vdec_drv = {
0076     .probe = clk_mt2701_vdec_probe,
0077     .driver = {
0078         .name = "clk-mt2701-vdec",
0079         .of_match_table = of_match_clk_mt2701_vdec,
0080     },
0081 };
0082
0083 builtin_platform_driver(clk_mt2701_vdec_drv);