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0007 #include <linux/clk-provider.h>
0008 #include <linux/platform_device.h>
0009
0010 #include "clk-mtk.h"
0011 #include "clk-gate.h"
0012
0013 #include <dt-bindings/clock/mt2701-clk.h>
0014
0015 static const struct mtk_gate_regs img_cg_regs = {
0016 .set_ofs = 0x0004,
0017 .clr_ofs = 0x0008,
0018 .sta_ofs = 0x0000,
0019 };
0020
0021 #define GATE_IMG(_id, _name, _parent, _shift) { \
0022 .id = _id, \
0023 .name = _name, \
0024 .parent_name = _parent, \
0025 .regs = &img_cg_regs, \
0026 .shift = _shift, \
0027 .ops = &mtk_clk_gate_ops_setclr, \
0028 }
0029
0030 static const struct mtk_gate img_clks[] = {
0031 GATE_IMG(CLK_IMG_SMI_COMM, "img_smi_comm", "mm_sel", 0),
0032 GATE_IMG(CLK_IMG_RESZ, "img_resz", "mm_sel", 1),
0033 GATE_IMG(CLK_IMG_JPGDEC_SMI, "img_jpgdec_smi", "mm_sel", 5),
0034 GATE_IMG(CLK_IMG_JPGDEC, "img_jpgdec", "mm_sel", 6),
0035 GATE_IMG(CLK_IMG_VENC_LT, "img_venc_lt", "mm_sel", 8),
0036 GATE_IMG(CLK_IMG_VENC, "img_venc", "mm_sel", 9),
0037 };
0038
0039 static const struct of_device_id of_match_clk_mt2701_img[] = {
0040 { .compatible = "mediatek,mt2701-imgsys", },
0041 {}
0042 };
0043
0044 static int clk_mt2701_img_probe(struct platform_device *pdev)
0045 {
0046 struct clk_hw_onecell_data *clk_data;
0047 int r;
0048 struct device_node *node = pdev->dev.of_node;
0049
0050 clk_data = mtk_alloc_clk_data(CLK_IMG_NR);
0051
0052 mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks),
0053 clk_data);
0054
0055 r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
0056 if (r)
0057 dev_err(&pdev->dev,
0058 "could not register clock provider: %s: %d\n",
0059 pdev->name, r);
0060
0061 return r;
0062 }
0063
0064 static struct platform_driver clk_mt2701_img_drv = {
0065 .probe = clk_mt2701_img_probe,
0066 .driver = {
0067 .name = "clk-mt2701-img",
0068 .of_match_table = of_match_clk_mt2701_img,
0069 },
0070 };
0071
0072 builtin_platform_driver(clk_mt2701_img_drv);